Convert the usages of GATE_CLK() in clock-apq8016 to GATE_CLK_POLLED() to
make sure that we poll the status when enabling clocks:
- PRNG_AHB_CLK is a vote clock, so we poll a different register address.
- The USB clocks are simple branches, so enable/poll is the same register.
Reviewed-by: Neil Armstrong <neil.armstr...@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerh...@linaro.org>
---
drivers/clk/qcom/clock-apq8016.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c
index
274c71c53ff76c9a7ea18e3698c12b20a9b1f418..e3a9807f580bc995395bd5debdb8d7a9dfa54795
100644
--- a/drivers/clk/qcom/clock-apq8016.c
+++ b/drivers/clk/qcom/clock-apq8016.c
@@ -54,9 +54,9 @@ static struct vote_clk gcc_blsp1_ahb_clk = {
};
static const struct gate_clk apq8016_clks[] = {
- GATE_CLK(GCC_PRNG_AHB_CLK, 0x45004, BIT(8)),
- GATE_CLK(GCC_USB_HS_AHB_CLK, 0x41008, BIT(0)),
- GATE_CLK(GCC_USB_HS_SYSTEM_CLK, 0x41004, BIT(0)),
+ GATE_CLK_POLLED(GCC_PRNG_AHB_CLK, 0x45004, BIT(8), 0x13004),
+ GATE_CLK_POLLED(GCC_USB_HS_AHB_CLK, 0x41008, BIT(0), 0x41008),
+ GATE_CLK_POLLED(GCC_USB_HS_SYSTEM_CLK, 0x41004, BIT(0), 0x41004),
};
/* SDHCI */
--
2.47.2
