ROM will configure a firewall to only allow HSRAM to be touched by the
R5 core. Any outside entity like DMA or the A53s will not have access to
this region. This can be problematic when U-Boot, running on the A53,
loads firmware that runs out of this region.
To simplify things remove the firewall here and let the remote core
firmware place a new firewall themselves if they wish for the memory
region.
Signed-off-by: Bryan Brattlof <b...@ti.com>
---
arch/arm/mach-k3/am62x/am625_init.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-k3/am62x/am625_init.c
b/arch/arm/mach-k3/am62x/am625_init.c
index 595fc391ac5aa..a422919fab131 100644
--- a/arch/arm/mach-k3/am62x/am625_init.c
+++ b/arch/arm/mach-k3/am62x/am625_init.c
@@ -29,6 +29,12 @@
/* TISCI DEV ID for A53 Clock */
#define AM62X_DEV_A53SS0_CORE_0_DEV_ID 135
+struct fwl_data rom_fwls[] = {
+ { "SOC_DEVGRP_MAIN", 641, 1 },
+ { "SOC_DEVGRP_MAIN", 642, 1 },
+ { "SOC_DEVGRP_MAIN", 642, 2 },
+};
+
/*
* This uninitialized global variable would normal end up in the .bss section,
* but the .bss is cleared between writing and reading this variable, so move
@@ -177,6 +183,7 @@ void board_init_f(ulong dummy)
{
struct udevice *dev;
int ret;
+ int i;
if (IS_ENABLED(CONFIG_CPU_V7R)) {
setup_k3_mpu_regions();
@@ -261,6 +268,11 @@ void board_init_f(ulong dummy)
/* Output System Firmware version info */
k3_sysfw_print_ver();
+ /* Disable firewalls ROM has configured. */
+ if (IS_ENABLED(CONFIG_CPU_V7R))
+ for (i = 0; i < ARRAY_SIZE(rom_fwls); i++)
+ remove_fwl_region(&rom_fwls[i]);
+
if (IS_ENABLED(CONFIG_ESM_K3)) {
/* Probe/configure ESM0 */
ret = uclass_get_device_by_name(UCLASS_MISC, "esm@420000",
&dev);
--
2.48.1
