Intel partial reconfiguration driver is enabled by default for Stratix10 SocFPGA boards.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapa...@altera.com> --- configs/socfpga_stratix10_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 3ea8259847..ff8a74be48 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -66,6 +66,7 @@ CONFIG_BOOTFILE="Image" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y +CONFIG_FPGA_INTEL_PR=y CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y -- 2.35.3