Upcoming patches are mapping memory with RO, RW^X etc permsissions.
Fix the meminfo command to display them properly
Acked-by: Jerome Forissier <jerome.foriss...@linaro.org>
Reviewed-by: Caleb Connolly <caleb.conno...@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodi...@linaro.org>
---
arch/arm/cpu/armv8/cache_v8.c | 26 +++++++++++++++++++++++---
arch/arm/include/asm/armv8/mmu.h | 2 ++
cmd/meminfo.c | 6 ++++++
3 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 5d6953ffedd1..c4b3da4a8da7 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -421,7 +421,7 @@ static int count_ranges(void)
return count;
}
-#define ALL_ATTRS (3 << 8 | PMD_ATTRINDX_MASK)
+#define ALL_ATTRS (3 << 8 | PMD_ATTRMASK)
#define PTE_IS_TABLE(pte, level) (pte_type(&(pte)) == PTE_TYPE_TABLE &&
(level) < 3)
enum walker_state {
@@ -568,6 +568,20 @@ static void pretty_print_table_attrs(u64 pte)
static void pretty_print_block_attrs(u64 pte)
{
u64 attrs = pte & PMD_ATTRINDX_MASK;
+ u64 perm_attrs = pte & PMD_ATTRMASK;
+ char mem_attrs[16] = { 0 };
+ int cnt = 0;
+
+ if (perm_attrs & PTE_BLOCK_PXN)
+ cnt += snprintf(mem_attrs + cnt, sizeof(mem_attrs) - cnt, "PXN
");
+ if (perm_attrs & PTE_BLOCK_UXN)
+ cnt += snprintf(mem_attrs + cnt, sizeof(mem_attrs) - cnt, "UXN
");
+ if (perm_attrs & PTE_BLOCK_RO)
+ cnt += snprintf(mem_attrs + cnt, sizeof(mem_attrs) - cnt, "RO");
+ if (!mem_attrs[0])
+ snprintf(mem_attrs, sizeof(mem_attrs), "RWX ");
+
+ printf(" | %-10s", mem_attrs);
switch (attrs) {
case PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE):
@@ -613,6 +627,7 @@ static void print_pte(u64 pte, int level)
{
if (PTE_IS_TABLE(pte, level)) {
printf(" %-5s", "Table");
+ printf(" %-12s", "|");
pretty_print_table_attrs(pte);
} else {
pretty_print_pte_type(pte);
@@ -642,9 +657,9 @@ static bool pagetable_print_entry(u64 start_attrs, u64 end,
int va_bits, int lev
printf("%*s", indent * 2, "");
if (PTE_IS_TABLE(start_attrs, level))
- printf("[%#011llx]%14s", _addr, "");
+ printf("[%#016llx]%19s", _addr, "");
else
- printf("[%#011llx - %#011llx]", _addr, end);
+ printf("[%#016llx - %#016llx]", _addr, end);
printf("%*s | ", (3 - level) * 2, "");
print_pte(start_attrs, level);
@@ -1112,3 +1127,8 @@ void __weak enable_caches(void)
icache_enable();
dcache_enable();
}
+
+void arch_dump_mem_attrs(void)
+{
+ dump_pagetable(gd->arch.tlb_addr, get_tcr(NULL, NULL));
+}
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 0ab681c893d3..6af8cd111a44 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -66,6 +66,7 @@
#define PTE_BLOCK_NG (1 << 11)
#define PTE_BLOCK_PXN (UL(1) << 53)
#define PTE_BLOCK_UXN (UL(1) << 54)
+#define PTE_BLOCK_RO (UL(1) << 7)
/*
* AttrIndx[2:0]
@@ -75,6 +76,7 @@
#define PMD_ATTRMASK (PTE_BLOCK_PXN | \
PTE_BLOCK_UXN | \
PMD_ATTRINDX_MASK | \
+ PTE_BLOCK_RO | \
PTE_TYPE_VALID)
/*
diff --git a/cmd/meminfo.c b/cmd/meminfo.c
index 5e83d61c2dd3..acdb38dcba02 100644
--- a/cmd/meminfo.c
+++ b/cmd/meminfo.c
@@ -15,6 +15,10 @@
DECLARE_GLOBAL_DATA_PTR;
+void __weak arch_dump_mem_attrs(void)
+{
+}
+
static void print_region(const char *name, ulong base, ulong size, ulong
*uptop)
{
ulong end = base + size;
@@ -58,6 +62,8 @@ static int do_meminfo(struct cmd_tbl *cmdtp, int flag, int
argc,
if (!IS_ENABLED(CONFIG_CMD_MEMINFO_MAP))
return 0;
+ arch_dump_mem_attrs();
+
printf("\n%-12s %8s %8s %8s %8s\n", "Region", "Base", "Size", "End",
"Gap");
printf("------------------------------------------------\n");
--
2.47.2
