On Thu, Jan 23, 2025 at 6:51 AM E Shattow <luc...@gmail.com> wrote:
>
> On Wed, Jan 22, 2025 at 5:01 PM Minda Chen <minda.c...@starfivetech.com> 
> wrote:
> >
> > Add Starfive JH7110 Cadence USB driver and related PHY driver.
> > So the codes can be used in visionfive2 and star64 7110 board.
> >
> > The driver is almost the same with kernel driver.
> >
> > Test with Star64 JH7110 board USB 3.0 + USB 2.0 host.
> > The code can work.
> >
> > The Starfive JH7110 has enable CONFIG_OF_UPSTREAM. The dts is
> > from kernel
> >
> > - previous version
> >   v1: 
> > https://patchwork.ozlabs.org/project/uboot/cover/20240504150358.19600-1-minda.c...@starfivetech.com/
> >   v2: 
> > https://patchwork.ozlabs.org/project/uboot/cover/20240704055014.55117-1-minda.c...@starfivetech.com/
> >   v3: 
> > https://patchwork.ozlabs.org/project/uboot/cover/20240719013822.101374-1-minda.c...@starfivetech.com/
> >   v4: 
> > https://patchwork.ozlabs.org/project/uboot/cover/20240829013058.6178-1-minda.c...@starfivetech.com/
> >
> > - patch description.
> >
> > patch1: Add set phy mode function in cdns3 core driver
> >         which is used by Starfive JH7110.
> > patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier
> > patch4: Cadence USB wrapper driver.
> > patch5: Get the dr mode from wrapper device node.
> > patch6: Add JH7110 USB default overcurrent pin.
> > patch7: config update.
> > patch8: MAINTAINERS update
> >
> > - change:
> >         v6:
> >         - patch 5 format changed.
> >         - split v5 patch4 to v6 patch 4 and patch 5
> >         - delete v6 dts patch7 because the StarFive JH7110
> >           CONFIG_OF_UPSTREAM is enbled.
> >         v5:
> >         - patch 2-4 format changed.
> >         - For pareparing enable OF_UPSTREAM, patch4 get the dr mode
> >           from parent device dts node not the cdns core device dts.
> >         - patch2 add a common usb syscon setting headfile.
> >         - delete v4 patch8 and the star64 dts setting can be setting
> >           int star64 board dts configuration if the OF_UPSTREAM is
> >           enable.
> >         v4:
> >         - patch 2 Add usb split setting, default set USB 2.0 only.
> >         - patch 5 move to spl stage.
> >         - Add a new patch 8 for star64 board usb host, vbus pin setting
> >           and usb 3.0
> >         v3:
> >         - patch 1 Move the added code to cdns3_drd_update_mode().
> >         - patch 1-4 correct the code format.(follow Rogers's comments.)
> >         - patch 3 using regmap_field.
> >
> >         v2:
> >         - patch 1 Move the added code to cdns3_core_init_role(). Must
> >           set PHY mode before calling cdns3 role start function.
> >         - patch 1-4 correct the code format.(follow Marek's comments.)
> >         - patch 2 Add set 125M clock in PHY init function.
> >         - Add new patch5.
> >
> >
> > Minda Chen (8):
> >   usb: cdns3: Set USB PHY mode in cdns3_drd_update_mode()
> >   phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
> >   phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
> >   usb: cdns: starfive: Get dr mode from wrapper device dts node
> >   usb: cdns: starfive: Add cdns USB driver
> >   spl: starfive: visionfive2: Disable USB overcurrent pin by default.
> >   configs: starfive: Add visionfive2 cadence USB configuration
> >   MAINTAINERS: Update Starfive visionfive2 maintain files.
> >
> >  arch/riscv/include/asm/arch-jh7110/gpio.h    |   5 +
> >  board/starfive/visionfive2/MAINTAINERS       |   2 +
> >  board/starfive/visionfive2/spl.c             |   3 +
> >  configs/starfive_visionfive2_defconfig       |  10 +
> >  drivers/phy/Kconfig                          |   1 +
> >  drivers/phy/Makefile                         |   1 +
> >  drivers/phy/starfive/Kconfig                 |  21 ++
> >  drivers/phy/starfive/Makefile                |   7 +
> >  drivers/phy/starfive/phy-jh7110-pcie.c       | 239 +++++++++++++++++++
> >  drivers/phy/starfive/phy-jh7110-usb-syscon.h |   9 +
> >  drivers/phy/starfive/phy-jh7110-usb2.c       | 162 +++++++++++++
> >  drivers/usb/cdns3/Kconfig                    |   7 +
> >  drivers/usb/cdns3/Makefile                   |   1 +
> >  drivers/usb/cdns3/cdns3-starfive.c           | 182 ++++++++++++++
> >  drivers/usb/cdns3/core.c                     |   3 +
> >  drivers/usb/cdns3/drd.c                      |  14 ++
> >  16 files changed, 667 insertions(+)
> >  create mode 100644 drivers/phy/starfive/Kconfig
> >  create mode 100644 drivers/phy/starfive/Makefile
> >  create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c
> >  create mode 100644 drivers/phy/starfive/phy-jh7110-usb-syscon.h
> >  create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c
> >  create mode 100644 drivers/usb/cdns3/cdns3-starfive.c
> >
> >
> > base-commit: bc157bb6667ed97e33be8ce8436c28baa275b295
> > --
> > 2.17.1
> >
>
> There are spelling and grammar errors in the commit messages for this
> series that I would like to see corrected. I will leave that for
> others doing code review to provide suggestions.
>
> This series can be applied as-is and does set the USB over-current
> register which allows USB function in Linux -next (i.e. Pine64 Star64,
> Milk-V Mars). However if you want USB2.0 functionality in U-Boot (i.e.
> Pine64 Star64, Milk-V Mars) then it is depending on at least
> dt-rebasing 6.14-rc1 which is not there yet as of this writing, and
> USB3.0 then additionally
> https://lore.kernel.org/linux-riscv/20250102183746.411526-...@freeshell.de
> series to reach dt-rebasing which is not expected before the close of
> Linux 6.14 merge window.
>
> Without regard to code quality or spelling and grammar mistakes, I
> have tested this series both with and without the anticipated changes
> from upstream Linux. All features are working to the extent that I
> would expect. For the series:
>
> Tested-by: E Shattow <luc...@gmail.com>

Can someone take this patch series? Else does it need another revision
from Minda? -E

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