On Wed, 2025-02-19 at 16:18 +0530, Chintan Vankar wrote: > From: Andreas Dannenberg <dannenb...@ti.com> > > Enable cache for AM62p to optimize performance of CPU to access data from > memory. > > Signed-off-by: Andreas Dannenberg <dannenb...@ti.com> > Signed-off-by: Chintan Vankar <c-van...@ti.com>
Reviewed-by: Alexander Sverdlin <alexander.sverd...@siemens.com> > --- > > Link to v1: > https://lore.kernel.org/r/20250107093840.2211381-11-c-van...@ti.com/ > > Changes from v1 to v2: > - Updated commit message. > > board/ti/am62px/evm.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/board/ti/am62px/evm.c b/board/ti/am62px/evm.c > index 75359fa1614..0be9817064b 100644 > --- a/board/ti/am62px/evm.c > +++ b/board/ti/am62px/evm.c > @@ -9,6 +9,7 @@ > #include <efi_loader.h> > #include <asm/arch/hardware.h> > #include <asm/io.h> > +#include <cpu_func.h> > #include <dm/uclass.h> > #include <env.h> > #include <fdt_support.h> > @@ -54,6 +55,13 @@ int board_init(void) > return 0; > } > > +#if IS_ENABLED(CONFIG_SPL_BUILD) > +void spl_board_init(void) > +{ > + enable_caches(); > +} > +#endif > + > #if defined(CONFIG_XPL_BUILD) > void spl_perform_fixups(struct spl_image_info *spl_image) > { -- Alexander Sverdlin Siemens AG www.siemens.com
