Dear Graeme Russ,

In message <4ddd7066.4000...@gmail.com> you wrote:
>
> > No, not at all. And I already answered this. For example on PPC, just
> > reading the timebase would be perfectly sufficient, and simpler and
> > more reliable than the current interrupt based approach.
> 
> I assume by 'timebase' you mean the 64-bit tick counter. If so, that is

By timebase I mean the timebase register, implemented as two 32 bit
registers tbu and tbl, holding the upper and the lower 32 bits of the
free-running 64 bit counter, respective.

> _exactly_ what I am suggesting we do (and what does already happen on ARM).

I don't think so.

Best regards,

Wolfgang Denk

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