Hi Arnaud,

On 2/10/25 4:30 PM, Arnaud Patard wrote:
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For SPL DFU booting, define u-boot,spl-boot-order and
configure usb nodes for enabling the gadget in SPL.

Signed-off-by: Arnaud Patard <arnaud.pat...@collabora.com>
---
  arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 23 +++++++++++++++++++++++
  1 file changed, 23 insertions(+)

diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi 
b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
index 883d399a06a..e1502f30039 100644
--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
@@ -11,6 +11,10 @@
                 sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
         };

+        chosen {
+                u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
+        };
+

This is already the default for all RK3399 boards, c.f.

arch/arm/dts/rk3399-u-boot.dtsi

         vcc_hub_en: vcc_hub_en-regulator {
                 compatible = "regulator-fixed";
                 enable-active-high;
@@ -75,3 +79,22 @@
         regulator-min-microvolt = <430000>;
         regulator-init-microvolt = <950000>;
  };
+
+&u2phy0 {
+       bootph-all;
+        status = "okay";
+
+        u2phy0_otg: otg-port {
+               bootph-all;
+                status = "okay";
+        };
+};
+&usbdrd3_0 {
+       bootph-all;
+        status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+       bootph-all;
+        status = "okay";
+};

For all the above, status = "okay" is already the default, it comes from dts/upstream/src/arm64/rockchip/rk3399-roc-pc.dtsi I believe since OF_UPSTREAM symbol is enabled (implied) by default.

u2phy0_otg label already exists, so you don't need to define it inside u2phy0, you can simply do:

&u2phy0_otg {
    bootph-all;
};

Although... I'm not entirely sure this is appropriate. I think you should rather have bootph-pre-ram instead, which is for the SPL. Finally, if I'm not mistaken every parent of a node with bootph- property is interpreted as having that property as well (but it is NOT written to their node), so you wouldn't need &u2phy0 nor &usbdrd3_0.

Cheers,
Quentin

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