When booting from NAND we get the environment from NAND.
Signed-off-by: Shaohui Xie <b21...@freescale.com>
Signed-off-by: Kumar Gala <ga...@kernel.crashing.org>
---
boards.cfg | 2 ++
include/configs/corenet_ds.h | 29 +++++++++++++++++++++++------
2 files changed, 25 insertions(+), 6 deletions(-)
diff --git a/boards.cfg b/boards.cfg
index 9f2b118..21182b9 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -574,12 +574,14 @@ P2020RDB_SPIFLASH powerpc mpc85xx
p1_p2_rdb freesca
P3041DS powerpc mpc85xx corenet_ds
freescale
P3041DS_SDCARD powerpc mpc85xx corenet_ds
freescale - P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
P3041DS_SPIFLASH powerpc mpc85xx corenet_ds
freescale - P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
+P3041DS_NAND powerpc mpc85xx corenet_ds
freescale - P3041DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
P4080DS powerpc mpc85xx corenet_ds
freescale
P4080DS_SDCARD powerpc mpc85xx corenet_ds
freescale - P4080DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
P4080DS_SPIFLASH powerpc mpc85xx corenet_ds
freescale - P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
P5020DS powerpc mpc85xx corenet_ds
freescale
P5020DS_SDCARD powerpc mpc85xx corenet_ds
freescale - P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
P5020DS_SPIFLASH powerpc mpc85xx corenet_ds
freescale - P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
+P5020DS_NAND powerpc mpc85xx corenet_ds
freescale - P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
mpq101 powerpc mpc85xx mpq101
mercury - mpq101
stxgp3 powerpc mpc85xx stxgp3 stx
stxssa powerpc mpc85xx stxssa stx
- stxssa
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 9ba032b..2e45b92 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -91,6 +91,11 @@
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_OFFSET (512 * 1097)
+#elif defined(CONFIG_NAND)
+#define CONFIG_SYS_EXTRA_ENV_RELOC
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
+#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE)
#else
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE -
CONFIG_ENV_SECT_SIZE)
@@ -196,10 +201,10 @@
#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
#endif
-#define CONFIG_SYS_BR0_PRELIM \
- (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | \
- BR_PS_16 | BR_V)
-#define CONFIG_SYS_OR0_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \
+#define CONFIG_SYS_FLASH_BR_PRELIM \
+ (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) \
+ | BR_PS_16 | BR_V)
+#define CONFIG_SYS_FLASH_OR_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY &
~OR_GPCM_EHTR) \
| OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR)
#define CONFIG_SYS_BR1_PRELIM \
@@ -268,9 +273,21 @@
| OR_FCM_TRLX \
| OR_FCM_EHTR)
-#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address
*/
-#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
+#ifdef CONFIG_NAND
+#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address
*/
+#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
+#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address
*/
+#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */
+#else
+#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address
*/
+#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */
+#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address
*/
+#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
+#endif
#endif /* CONFIG_NAND_FSL_ELBC */
+#else
+#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address
*/
+#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */
#endif
#define CONFIG_SYS_FLASH_EMPTY_INFO
--
1.6.4
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
