From: Quentin Schulz <quentin.sch...@cherry.de>
I don't see a reason why this should only be enabled on a per-board
basis. The rng IP is inside the SoC and doesn't seem to rely on anything
external to it, therefore let's enable it on the SoC DTSI and remove the
now empty px30-evb-u-boot.dtsi.
Signed-off-by: Quentin Schulz <quentin.sch...@cherry.de>
---
arch/arm/dts/px30-evb-u-boot.dtsi | 10 ----------
arch/arm/dts/px30-u-boot.dtsi | 1 -
2 files changed, 11 deletions(-)
diff --git a/arch/arm/dts/px30-evb-u-boot.dtsi
b/arch/arm/dts/px30-evb-u-boot.dtsi
deleted file mode 100644
index
61b1433af9192044a34ccf66763f2142a44288ab..0000000000000000000000000000000000000000
--- a/arch/arm/dts/px30-evb-u-boot.dtsi
+++ /dev/null
@@ -1,10 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * (C) Copyright 2020 Rockchip Electronics Co., Ltd
- */
-
-#include "px30-u-boot.dtsi"
-
-&rng {
- status = "okay";
-};
diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
index
abc6b49e6663ccfbc5659f0467c511934832da67..157d0ea6930c55cc067560bd795249a39c3249ab
100644
--- a/arch/arm/dts/px30-u-boot.dtsi
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -24,7 +24,6 @@
rng: rng@ff0b0000 {
compatible = "rockchip,cryptov2-rng";
reg = <0x0 0xff0b0000 0x0 0x4000>;
- status = "disabled";
};
};
--
2.48.1
