> -----Original Message-----
> From: biguncle...@gmail.com <biguncle...@gmail.com>
> Sent: Monday, December 2, 2024 12:07 AM
>
> From: Maksim Kiselev <biguncle...@gmail.com>
>
> Add SDHCI and EMMC controlles nodes on TH-1520 SoC. And enable them for
> Lichee module 4A.
>
> Signed-off-by: Maksim Kiselev <biguncle...@gmail.com>

Reviewed-by: Jaehoon Chung <jh80.chung>

Best Regards,
Jaehoon Chung

> ---
>  arch/riscv/dts/th1520-lichee-module-4a.dtsi | 18 +++++++++++
>  arch/riscv/dts/th1520.dtsi                  | 34 +++++++++++++++++++++
>  2 files changed, 52 insertions(+)
>
> diff --git a/arch/riscv/dts/th1520-lichee-module-4a.dtsi 
> b/arch/riscv/dts/th1520-lichee-module-4a.dtsi
> index dc00e3dfa0..86a81bdcf7 100644
> --- a/arch/riscv/dts/th1520-lichee-module-4a.dtsi
> +++ b/arch/riscv/dts/th1520-lichee-module-4a.dtsi
> @@ -32,3 +32,21 @@
>  &uart_sclk {
>       clock-frequency = <100000000>;
>  };
> +
> +&emmc {
> +     bus-width = <8>;
> +     max-frequency = <198000000>;
> +     mmc-ddr-1_8v;
> +     mmc-hs400-1_8v;
> +     mmc-hs400-enhanced-strobe;
> +     non-removable;
> +     no-sdio;
> +     no-sd;
> +     status = "okay";
> +};
> +
> +&sdio0 {
> +     bus-width = <4>;
> +     max-frequency = <198000000>;
> +     status = "okay";
> +};
> diff --git a/arch/riscv/dts/th1520.dtsi b/arch/riscv/dts/th1520.dtsi
> index d68c446a6b..9378de89c5 100644
> --- a/arch/riscv/dts/th1520.dtsi
> +++ b/arch/riscv/dts/th1520.dtsi
> @@ -141,6 +141,13 @@
>               #clock-cells = <0>;
>       };
>
> +     sdhci_clk: sdhci-clock {
> +             compatible = "fixed-clock";
> +             clock-frequency = <198000000>;
> +             clock-output-names = "sdhci_clk";
> +             #clock-cells = <0>;
> +     };
> +
>       soc {
>               compatible = "simple-bus";
>               interrupt-parent = <&plic>;
> @@ -206,6 +213,33 @@
>                       status = "disabled";
>               };
>
> +             emmc: mmc@ffe7080000 {
> +                     compatible = "thead,th1520-dwcmshc";
> +                     reg = <0xff 0xe7080000 0x0 0x10000>;
> +                     interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
> +                     clocks = <&sdhci_clk>;
> +                     clock-names = "core";
> +                     status = "disabled";
> +             };
> +
> +             sdio0: mmc@ffe7090000 {
> +                     compatible = "thead,th1520-dwcmshc";
> +                     reg = <0xff 0xe7090000 0x0 0x10000>;
> +                     interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
> +                     clocks = <&sdhci_clk>;
> +                     clock-names = "core";
> +                     status = "disabled";
> +             };
> +
> +             sdio1: mmc@ffe70a0000 {
> +                     compatible = "thead,th1520-dwcmshc";
> +                     reg = <0xff 0xe70a0000 0x0 0x10000>;
> +                     interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
> +                     clocks = <&sdhci_clk>;
> +                     clock-names = "core";
> +                     status = "disabled";
> +             };
> +
>               uart1: serial@ffe7f00000 {
>                       compatible = "snps,dw-apb-uart";
>                       reg = <0xff 0xe7f00000 0x0 0x100>;
> --
> 2.45.2



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