[PATCH 4/4] DONOTMERGE: arm: mach-k3: j784s4_init: Trigger LBIST and PBIST on MAIN R5 2_0

[Neha Malcom Francis]

Trigger all tests of PBIST and LBIST using appropriate calls to set the
core under test (MAIN R5 2_0) to it's required state.

Signed-off-by: Neha Malcom Francis <n-fran...@ti.com>
---
 arch/arm/mach-k3/j784s4/j784s4_init.c | 48 +++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c 
b/arch/arm/mach-k3/j784s4/j784s4_init.c
index 07b5d7d7504..f9bd13d962b 100644
--- a/arch/arm/mach-k3/j784s4/j784s4_init.c
+++ b/arch/arm/mach-k3/j784s4/j784s4_init.c
@@ -17,6 +17,7 @@
 #include <dm/pinctrl.h>
 #include <mmc.h>
 #include <remoteproc.h>
+#include <k3_bist.h>
 
 #include "../sysfw-loader.h"
 #include "../common.h"
@@ -233,9 +234,56 @@ void k3_mem_init(void)
 
 void board_init_f(ulong dummy)
 {
+       struct udevice *dev;
+       int ret;
+
        k3_spl_init();
        k3_mem_init();
 
+       if (!IS_ENABLED(CONFIG_CPU_V7R) && IS_ENABLED(CONFIG_K3_BIST)) {
+               ret = uclass_get_device_by_driver(UCLASS_MISC,
+                                                 DM_DRIVER_GET(k3_bist),
+                                                 &dev);
+               if (ret)
+                       printf("Failed to run BIST: %d\n", ret);
+
+               struct bist_ops *ops = (struct bist_ops *)device_get_ops(dev);
+               struct ti_sci_handle *handle = get_ti_sci_handle();
+
+               /* get status of HW POST PBIST on MCU1_x */
+               ret = ops->run_pbist_post();
+               if (ret)
+                       panic("HW POST LBIST on MCU1_x failed: %d\n", ret);
+
+               /* trigger PBIST tests on MCU4_0 */
+               prepare_pbist(handle);
+               ret = ops->run_pbist_neg();
+               deprepare_pbist(handle);
+
+               prepare_pbist(handle);
+               ret |= ops->run_pbist();
+               deprepare_pbist(handle);
+
+               prepare_pbist(handle);
+               ret |= ops->run_pbist_rom();
+               deprepare_pbist(handle);
+
+               if (ret)
+                       panic("PBIST on MCU4_0 failed: %d\n", ret);
+
+               /* get status of HW POST PBIST on MCU1_x */
+               ret = ops->run_lbist_post();
+               if (ret)
+                       panic("HW POST LBIST on MCU1_x failed: %d\n", ret);
+
+               /* trigger LBIST tests on MCU1_x */
+               prepare_lbist(handle);
+               ret = ops->run_lbist();
+               deprepare_lbist(handle);
+               if (ret)
+                       panic("LBIST on MCU4_0 failed: %d\n", ret);
+       }
+
        if (IS_ENABLED(CONFIG_CPU_V7R))
                setup_navss_nb();
 
-- 
2.34.1