[PATCH] iommu: qcom-smmu: handle running in el2

[Caleb Connolly]

We only need to configure the SMMU when running in EL1. In EL2 the
hypervisor isn't running so peripherals can just do DMA as they wish.

Signed-off-by: Caleb Connolly <caleb.conno...@linaro.org>
---
 drivers/iommu/qcom-hyp-smmu.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/iommu/qcom-hyp-smmu.c b/drivers/iommu/qcom-hyp-smmu.c
index 1b5a09bb7b39..7b7b3ba01a07 100644
--- a/drivers/iommu/qcom-hyp-smmu.c
+++ b/drivers/iommu/qcom-hyp-smmu.c
@@ -90,8 +90,10 @@ enum arm_smmu_s2cr_type {
 struct qcom_smmu_priv {
        phys_addr_t base;
        struct list_head devices;
        struct udevice *dev;
+       /* SMMU is not needed when running in EL2 */
+       bool disable;
 
        /* Read-once config */
        int num_cb;
        int num_smr;
@@ -276,8 +278,11 @@ static int qcom_smmu_connect(struct udevice *dev)
        priv = dev_get_priv(dev->iommu);
        if (WARN_ON(!priv))
                return -EINVAL;
 
+       if (priv->disable)
+               return 0;
+
        mdev = alloc_dev(dev);
        if (IS_ERR(mdev) && PTR_ERR(mdev) != -EEXIST) {
                printf("%s: %s Couldn't create mmu context\n", __func__,
                       dev->name);
@@ -347,8 +352,10 @@ static int qcom_smmu_probe(struct udevice *dev)
        priv->dev = dev;
        priv->base = dev_read_addr(dev);
        INIT_LIST_HEAD(&priv->devices);
 
+       priv->disable = current_el() > 1;
+
        /* Read SMMU config */
        val = gr0_readl(priv, ARM_SMMU_GR0_ID0);
        priv->num_smr = FIELD_GET(ARM_SMMU_ID0_NUMSMRG, val);
 
-- 
2.47.0