[PATCH 4/6] Revert "mtd: spi-nor: Add parallel and stacked memories support in read_bar and write_bar"

[Marek Vasut]

This reverts commit c480ec2c45b221b2044c6268c9773e78fa47f305.

Signed-off-by: Marek Vasut <marek.vasut+rene...@mailbox.org>
---
Cc: Andre Przywara <andre.przyw...@arm.com>
Cc: Ashok Reddy Soma <ashok.reddy.s...@amd.com>
Cc: Jagan Teki <ja...@amarulasolutions.com>
Cc: Michael Walle <mwa...@kernel.org>
Cc: Michal Simek <michal.si...@amd.com>
Cc: Patrice Chotard <patrice.chot...@foss.st.com>
Cc: Patrick Delaunay <patrick.delau...@foss.st.com>
Cc: Pratyush Yadav <p.ya...@ti.com>
Cc: Quentin Schulz <quentin.sch...@cherry.de>
Cc: Sean Anderson <sean...@gmail.com>
Cc: Simon Glass <s...@chromium.org>
Cc: Takahiro Kuwano <takahiro.kuw...@infineon.com>
Cc: Tom Rini <tr...@konsulko.com>
Cc: Tudor Ambarus <tudor.amba...@linaro.org>
Cc: Venkatesh Yadav Abbarapu <venkatesh.abbar...@amd.com>
Cc: u-boot@lists.denx.de
Cc: uboot-st...@st-md-mailman.stormreply.com
---
 drivers/mtd/spi/spi-nor-core.c | 55 +++++-----------------------------
 1 file changed, 8 insertions(+), 47 deletions(-)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index f5c9868bbca..19bf5cfb4f0 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -956,32 +956,12 @@ static int clean_bar(struct spi_nor *nor)
 
 static int write_bar(struct spi_nor *nor, u32 offset)
 {
-       u8 cmd, bank_sel, upage_curr;
+       u8 cmd, bank_sel;
        int ret;
-       struct mtd_info *mtd = &nor->mtd;
-
-       /* Wait until previous write command is finished */
-       if (spi_nor_wait_till_ready(nor))
-               return 1;
-
-       if (nor->flags & (SNOR_F_HAS_PARALLEL | SNOR_F_HAS_STACKED) &&
-           mtd->size <= SZ_32M)
-               return 0;
-
-       if (mtd->size <= SZ_16M)
-               return 0;
-
-       offset = offset % (u32)mtd->size;
-       bank_sel = offset >> 24;
 
-       upage_curr = nor->spi->flags & SPI_XFER_U_PAGE;
-
-       if (!(nor->flags & SNOR_F_HAS_STACKED) && bank_sel == nor->bank_curr)
-               return 0;
-       else if (upage_curr == nor->upage_prev && bank_sel == nor->bank_curr)
-               return 0;
-
-       nor->upage_prev = upage_curr;
+       bank_sel = offset / SZ_16M;
+       if (bank_sel == nor->bank_curr)
+               goto bar_end;
 
        cmd = nor->bank_write_cmd;
        write_enable(nor);
@@ -991,19 +971,15 @@ static int write_bar(struct spi_nor *nor, u32 offset)
                return ret;
        }
 
+bar_end:
        nor->bank_curr = bank_sel;
-
-       return write_disable(nor);
+       return nor->bank_curr;
 }
 
 static int read_bar(struct spi_nor *nor, const struct flash_info *info)
 {
        u8 curr_bank = 0;
        int ret;
-       struct mtd_info *mtd = &nor->mtd;
-
-       if (mtd->size <= SZ_16M)
-               return 0;
 
        switch (JEDEC_MFR(info)) {
        case SNOR_MFR_SPANSION:
@@ -1015,30 +991,15 @@ static int read_bar(struct spi_nor *nor, const struct 
flash_info *info)
                nor->bank_write_cmd = SPINOR_OP_WREAR;
        }
 
-       if (nor->flags & SNOR_F_HAS_PARALLEL)
-               nor->spi->flags |= SPI_XFER_LOWER;
-
        ret = nor->read_reg(nor, nor->bank_read_cmd,
-                           &curr_bank, 1);
+                                   &curr_bank, 1);
        if (ret) {
                debug("SF: fail to read bank addr register\n");
                return ret;
        }
        nor->bank_curr = curr_bank;
 
-       // Make sure both chips use the same BAR
-       if (nor->flags & SNOR_F_HAS_PARALLEL) {
-               write_enable(nor);
-               ret = nor->write_reg(nor, nor->bank_write_cmd, &curr_bank, 1);
-               if (ret)
-                       return ret;
-
-               ret = write_disable(nor);
-               if (ret)
-                       return ret;
-       }
-
-       return ret;
+       return 0;
 }
 #endif
 
-- 
2.45.2