This allows setting the GPIO parameters from device tree, otherwise the at91_pin_check_config will fail because the priv->nbanks equal to zero
Signed-off-by: Alexey Tsirlin <ale...@all4bambi.com>
---
arch/arm/dts/sama5d3.dtsi | 111 +++++++++++++++++++-------------------
1 file changed, 56 insertions(+), 55 deletions(-)
diff --git a/arch/arm/dts/sama5d3.dtsi b/arch/arm/dts/sama5d3.dtsi
index 4c03a302ec..c671ea42f2 100644
--- a/arch/arm/dts/sama5d3.dtsi
+++ b/arch/arm/dts/sama5d3.dtsi
@@ -873,66 +873,67 @@
AT91_PIOE 17
AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
};
};
- };
- pioA: gpio@fffff200 {
- compatible = "atmel,at91sam9x5-gpio",
"atmel,at91rm9200-gpio";
- reg = <0xfffff200 0x100>;
- interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pioA_clk>;
- bootph-all;
- };
+ pioA: gpio@fffff200 {
+ compatible = "atmel,at91sam9x5-gpio",
"atmel,at91rm9200-gpio";
+ reg = <0xfffff200 0x100>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioA_clk>;
+ bootph-all;
+ };
- pioB: gpio@fffff400 {
- compatible = "atmel,at91sam9x5-gpio",
"atmel,at91rm9200-gpio";
- reg = <0xfffff400 0x100>;
- interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pioB_clk>;
- bootph-all;
- };
+ pioB: gpio@fffff400 {
+ compatible = "atmel,at91sam9x5-gpio",
"atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x100>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioB_clk>;
+ bootph-all;
+ };
- pioC: gpio@fffff600 {
- compatible = "atmel,at91sam9x5-gpio",
"atmel,at91rm9200-gpio";
- reg = <0xfffff600 0x100>;
- interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pioC_clk>;
- bootph-all;
- };
+ pioC: gpio@fffff600 {
+ compatible = "atmel,at91sam9x5-gpio",
"atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x100>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioC_clk>;
+ bootph-all;
+ };
- pioD: gpio@fffff800 {
- compatible = "atmel,at91sam9x5-gpio",
"atmel,at91rm9200-gpio";
- reg = <0xfffff800 0x100>;
- interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pioD_clk>;
- bootph-all;
- };
+ pioD: gpio@fffff800 {
+ compatible = "atmel,at91sam9x5-gpio",
"atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x100>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioD_clk>;
+ bootph-all;
+ };
+
+ pioE: gpio@fffffa00 {
+ compatible = "atmel,at91sam9x5-gpio",
"atmel,at91rm9200-gpio";
+ reg = <0xfffffa00 0x100>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&pioE_clk>;
+ bootph-all;
+ };
- pioE: gpio@fffffa00 {
- compatible = "atmel,at91sam9x5-gpio",
"atmel,at91rm9200-gpio";
- reg = <0xfffffa00 0x100>;
- interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- clocks = <&pioE_clk>;
- bootph-all;
};
pmc: pmc@fffffc00 {
--
2.34.1
