On Mon, Jul 29, 2024 at 5:28 PM Simon Glass <s...@chromium.org> wrote: > > Hi Patrick, > > On Sat, 27 Jul 2024 at 01:20, Patrick Rudolph > <patrick.rudo...@9elements.com> wrote: > > > > Write MADT in common code and let the SoC fill out the body by > > calling acpi_fill_madt() which must be implemented at SoC level. > > > > Signed-off-by: Patrick Rudolph <patrick.rudo...@9elements.com> > > Cc: Simon Glass <s...@chromium.org> > > Cc: Bin Meng <bmeng...@gmail.com> > > --- > > arch/sandbox/lib/Makefile | 9 +++--- > > arch/sandbox/lib/acpi_table.c | 7 +++++ > > arch/x86/cpu/intel_common/acpi.c | 20 +++++++++----- > > arch/x86/cpu/tangier/acpi.c | 6 +++- > > arch/x86/include/asm/acpi_table.h | 3 +- > > arch/x86/lib/acpi_table.c | 46 ++++++------------------------- > > include/acpi/acpi_table.h | 11 ++++++++ > > lib/acpi/acpi_table.c | 31 +++++++++++++++++++++ > > 8 files changed, 81 insertions(+), 52 deletions(-) > > create mode 100644 arch/sandbox/lib/acpi_table.c > > Same comment as previous patch. While it might be possible to write out GICC and LAPIC or X2APIC using a CPU driver, how would the other sub-tables integrate into the acpi_ops?
On x86 you have ioapic and irq_overrides and on arm GICR and ITS sub-tables. Would I need to add "Interrupt controller" drivers for each platform, fill it with platform specific data and then fill out the MADT table using acpi_ops? While that seems nice to have, it would be quite a lot of work, since none of the interface or drivers exists at the moment. It even looks like not all platforms even use a CPU driver and even less use an interrupt controller driver... > > Regards, > Simon
