Hi Simon,
On 2024-06-26 16:54, Simon Glass wrote:
> Hi Jonas,
>
> On Mon, 24 Jun 2024 at 09:53, Jonas Karlman <jo...@kwiboo.se> wrote:
>>
>> Hi Simon,
>>
>> On 2024-06-23 19:53, Simon Glass wrote:
>>> The code here is confusing due to large blocks which are #ifdefed out.
>>> Add a function phase_sdram_init() which returns whether SDRAM init
>>> should happen in the current phase, using that as needed to control the
>>> code flow.
>>>
>>> This increases code size by about 500 bytes in SPL when the cache is on,
>>> since it must call the rather large rockchip_sdram_size() function.
>>>
>>> Signed-off-by: Simon Glass <s...@chromium.org>
>>> ---
>>>
>>> Changes in v4:
>>> - Drop the non-dcache optimisation, since the cache should normally be on
>>>
>>> Changes in v3:
>>> - Split out the refactoring into a separate patch
>>>
>>> drivers/ram/rockchip/sdram_rk3399.c | 42 +++++++++++++++--------------
>>> 1 file changed, 22 insertions(+), 20 deletions(-)
>>>
>>> diff --git a/drivers/ram/rockchip/sdram_rk3399.c
>>> b/drivers/ram/rockchip/sdram_rk3399.c
>>> index 3c4e20f4e80..949a082d00c 100644
>>> --- a/drivers/ram/rockchip/sdram_rk3399.c
>>> +++ b/drivers/ram/rockchip/sdram_rk3399.c
>>
>> [snip]
>>
>>> @@ -191,6 +186,17 @@ struct io_setting {
>>> },
>>> };
>>>
>>> +/**
>>> + * phase_sdram_init() - Check if this is the phase where SDRAM init happens
>>> + *
>>> + * Returns: true to do SDRAM init in this phase, false to not
>>> + */
>>> +static bool phase_sdram_init(void)
>>> +{
>>> + return spl_phase() == PHASE_TPL ||
>>> + (!IS_ENABLED(CONFIG_TPL) && !spl_in_proper());
>>
>> This also need to check for !IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL).
>
> I don't see this condition in the current code...I am wondering how
> this works today?
Currently you have to build with CONFIG_TPL, then throw TPL away to use
CONFIG_ROCKCHIP_EXTERNAL_TPL.
Regards,
Jonas
>
> Regards,
> Simon
