Dear reader,
For my master thesis in Electrical Engineering I am working on providing
OpenWRT support for pynqz2 and adrv9361 boards (armv7 32bit).
OpenWRT uses U-Boot 2019.07.
In the default config file (that I partly had to add stuff/remove stuff myself,
see attachment zynq_pynqz2_defconfig), the CONFIG_SPL_OS_BOOT setting is set to
yes.
This failed during boot, the boot image is a FIT image.
Booting via load+bootm works (see attachment boot_commands.txt and
load_bootm_log.txt).
If I understand it correctly, this is a SIMPLE_FIT?
I have been trying to get the SPL to boot the kernel for a few days now.
It seems to be stuck on the gunzip function (see attachment SPL_log.txt)
Does anybody has a clue to what is going on here?
Documentation and more about SPL booting kernel and FIT images are always
welcome.
Kind regards,
Robbe Gaeremynck
Student ma - Electrical Engineering - Electronic Circuits and Systems
ls mmc 0:1
load mmc 0:1 0x1000000 fit.itb
set bootargs 'console=ttyPS0,115200n8 root=/dev/mmcblk0p2 rootwait earlyprintk'
bootm 0x1000000
Zynq> load mmc 0:1 0x1000000 fit.itb
reading fit.itb at pos 0, maxsize 0, to memory pos 0x01000000
4947228 bytes read in 283 ms (16.7 MiB/s)
Zynq> bootm 0x1000000
## Loading kernel from FIT Image at 01000000 ...
Using 'config-1' configuration
Trying 'kernel-1' kernel subimage
Description: ARM OpenWrt Linux-5.15.138
Type: Kernel Image
Compression: gzip compressed
Data Start: 0x010000e4
Data Size: 4936814 Bytes = 4.7 MiB
Architecture: ARM
OS: Linux
Load Address: 0x00008000
Entry Point: 0x00008000
Hash algo: crc32
Hash value: 5240d5bb
Hash algo: sha1
Hash value: 4600271e41e01f3194a5372467179e852b06d389
Verifying Hash Integrity ... crc32+ sha1+ OK
## Loading fdt from FIT Image at 01000000 ...
Using 'config-1' configuration
Trying 'fdt-1' fdt subimage
Description: ARM OpenWrt tul_zynq-pynq-z2 device tree blob
Type: Flat Device Tree
Compression: uncompressed
Data Start: 0x014b5690
Data Size: 8518 Bytes = 8.3 KiB
Architecture: ARM
Hash algo: crc32
Hash value: 26dcef04
Hash algo: sha1
Hash value: 4d0eeb6e70f1b87c8df9f2576d05ec77919e431b
Verifying Hash Integrity ... crc32+ sha1+ OK
Booting using the fdt blob at 0x14b5690
Uncompressing Kernel Image ... dst_addr 00008000 | unc_len 62914560 |
img_buf 010000e4 | lenp 4936814
OK
kernel loaded at 0x00008000, end = 0x00c9ab00
Loading Device Tree to 1eb35000, end 1eb3a145 ... OK
## Transferring control to Linux (at address 00008000)...
U-Boot SPL 2019.07-OpenWrt-r23634-a39dca7ead (Nov 19 2023 - 13:44:36 +0000)
mmc boot
Trying to boot from MMC1
spl_mmc_load_image start
CONFIG_SPL_FAT_FAT : not starting uboot
reading system.dtb at pos 0, maxsize 0, to memory pos 0x10000000
reading fit.itb at pos 0, maxsize 64, to memory pos 0x03ffffc0
reading fit.itb at pos 0, maxsize 4947228, to memory pos 0x01000000
embedded data
calling gunzip dst_addr: 00008000 | unc_len 62914560 | img_buf 010000e4 | lenp
4936814
dst_addr 00008000 | unc_len 62914560 | img_buf 010000e4 | lenp 4936814
CONFIG_ARM=y
CONFIG_ARCH_ZYNQ=y
CONFIG_SYS_TEXT_BASE=0x4000000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xe0000000
CONFIG_DEBUG_UART_CLOCK=50000000
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SPL_GZIP=y # Kernel is compressed as gzip, see build process openwrt
CONFIG_DEBUG=y
# DEBUG:Trying to clone rk3328
CONFIG_FIT=y
# CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
# CONFIG_IMAGE_FORMAT_LEGACY=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_LOAD_FIT=y // Single kernel + fdt blob = simple fit image
CONFIG_DEFAULT_FDT_FILE="system.dtb"
# CONFIG_SPL_SPI_LOAD=y
CONFIG_SPL_PAYLOAD="fit.itb"
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_SPL_MMC_BOOT=y
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DEFAULT_DEVICE_TREE="zynq-pynq-z2"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_REALTEK=y
CONFIG_MII=y
CONFIG_ZYNQ_GEM=y
CONFIG_ZYNQ_GEM_SPI_MAC_OFFSET=0x20
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_ZYNQ_QSPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_ULPI_VIEWPORT=y
CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
