Turn display connector power off on boot and reboot to prevent any
bogus start up sequence of any panel potentially attached to the
display connector.
Signed-off-by: Marek Vasut <ma...@denx.de>
---
Cc: Fabio Estevam <feste...@gmail.com>
Cc: Peng Fan <peng....@nxp.com>
Cc: Stefano Babic <sba...@denx.de>
---
.../dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi | 49 +++++++++++++++++++
.../dts/imx8mp-data-modul-edm-sbc-u-boot.dtsi | 48 ++++++++++++++++++
2 files changed, 97 insertions(+)
diff --git a/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi
b/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi
index 144c42b2103..a235e088fa4 100644
--- a/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi
@@ -77,10 +77,59 @@
&gpio2 {
bootph-pre-ram;
+
+ dsi-reset-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-high;
+ gpios = <2 GPIO_ACTIVE_LOW>;
+ line-name = "DSI_RESET_1V8#";
+ };
+
+
+ dsi-irq-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <3 GPIO_ACTIVE_LOW>;
+ line-name = "DSI_IRQ_1V8#";
+ };
+
+ graphics-prsnt-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_LOW>;
+ line-name = "GRAPHICS_PRSNT_1V8#";
+ };
};
&gpio3 {
bootph-pre-ram;
+
+ bl-enable-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-low;
+ gpios = <0 GPIO_ACTIVE_HIGH>;
+ line-name = "BL_ENABLE_1V8";
+ };
+
+ tft-enable-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-low;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ line-name = "TFT_ENABLE_1V8";
+ };
+
+ graphics-gpio0-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "GRAPHICS_GPIO0_1V8";
+ };
};
&gpio4 {
diff --git a/arch/arm/dts/imx8mp-data-modul-edm-sbc-u-boot.dtsi
b/arch/arm/dts/imx8mp-data-modul-edm-sbc-u-boot.dtsi
index eafe9b9308c..a2b5976b6bd 100644
--- a/arch/arm/dts/imx8mp-data-modul-edm-sbc-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-data-modul-edm-sbc-u-boot.dtsi
@@ -67,10 +67,58 @@
&gpio3 {
bootph-pre-ram;
+
+ bl-enable-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-low;
+ gpios = <0 GPIO_ACTIVE_HIGH>;
+ line-name = "BL_ENABLE_1V8";
+ };
+
+ tft-enable-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-low;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ line-name = "TFT_ENABLE_1V8";
+ };
+
+ graphics-gpio0-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "GRAPHICS_GPIO0_1V8";
+ };
};
&gpio4 {
bootph-pre-ram;
+
+ dsi-reset-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-high;
+ gpios = <0 GPIO_ACTIVE_LOW>;
+ line-name = "DSI_RESET_1V8#";
+ };
+
+ graphics-prsnt-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <18 GPIO_ACTIVE_LOW>;
+ line-name = "GRAPHICS_PRSNT_1V8#";
+ };
+
+ dsi-irq-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <19 GPIO_ACTIVE_LOW>;
+ line-name = "DSI_IRQ_1V8#";
+ };
};
&gpio5 {
--
2.43.0
