Hello
Since commit 68e6ecadc551 ("net: phy: marvell 88e151x: Fix handling of
RGMII interface types") it is possible to set the Rx/Tx delays settings
of Marvell PHYs from the DTS.
The code handled all 4 possible cases ("PHY_INTERFACE_MODE_RGMII",
"PHY_INTERFACE_MODE_RGMII_ID", "PHY_INTERFACE_MODE_RGMII_RXID",
"PHY_INTERFACE_MODE_RGMII_TXID") of the Rx/Tx delay bits in the MSCR
register.
Later, commit 431be621c6cb ("net: phy: marvell 88e151x: Fix handling of
bare RGMII interface type") merged the "PHY_INTERFACE_MODE_RGMII" and
"PHY_INTERFACE_MODE_RGMII_ID" cases, effectively loosing the possibility
to specify Rx/Tx delay bits both cleared.
This looks wrong for at least two reasons:
- How does one describe a system with a Rx/Tx delay bits clear
requirement in the DTS properly?
- The Linux Marvell PHY driver does not merge the
"PHY_INTERFACE_MODE_RGMII" and "PHY_INTERFACE_MODE_RGMII_ID"
cases either.
Therefore I think commit 431be621c6cb should be reverted.
Or am I missing something here?
