Move the header file and definitions of fttmr010
power control unit from a320 SoC folder to
"include/faraday" folder.
This change will let other SoC which also use fttmr010
could share the same header file.
Signed-off-by: Macpaul Lin <macp...@andestech.com>
---
Changes for v2:
- Fix patch according to the dependent patches of a320evb in
u-boot-arm.git
"next" branch.
- V1 patches of fttmr010 as "/patch/71952/" marked as "superseded" in
patchworks.
- Move files into "include/faraday" instead of "drivers/timer".
arch/arm/include/asm/arch-a320/fttmr010.h |
73 -----------------------------
include/faraday/fttmr010.h | 73
+++++++++++++++++++++++++++++
2 files changed, 73 insertions(+), 73 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-a320/fttmr010.h
create mode 100644 include/faraday/fttmr010.h
diff --git a/arch/arm/include/asm/arch-a320/fttmr010.h
b/arch/arm/include/asm/arch-a320/fttmr010.h
deleted file mode 100644
index 72abcb3..0000000
--- a/arch/arm/include/asm/arch-a320/fttmr010.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * (C) Copyright 2009 Faraday Technology
- * Po-Yu Chuang <ratb...@faraday-tech.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-/*
- * Timer
- */
-#ifndef __FTTMR010_H
-#define __FTTMR010_H
-
-struct fttmr010 {
- unsigned int timer1_counter; /* 0x00 */
- unsigned int timer1_load; /* 0x04 */
- unsigned int timer1_match1; /* 0x08 */
- unsigned int timer1_match2; /* 0x0c */
- unsigned int timer2_counter; /* 0x10 */
- unsigned int timer2_load; /* 0x14 */
- unsigned int timer2_match1; /* 0x18 */
- unsigned int timer2_match2; /* 0x1c */
- unsigned int timer3_counter; /* 0x20 */
- unsigned int timer3_load; /* 0x24 */
- unsigned int timer3_match1; /* 0x28 */
- unsigned int timer3_match2; /* 0x2c */
- unsigned int cr; /* 0x30 */
- unsigned int interrupt_state; /* 0x34 */
- unsigned int interrupt_mask; /* 0x38 */
-};
-
-/*
- * Timer Control Register
- */
-#define FTTMR010_TM3_UPDOWN (1 << 11)
-#define FTTMR010_TM2_UPDOWN (1 << 10)
-#define FTTMR010_TM1_UPDOWN (1 << 9)
-#define FTTMR010_TM3_OFENABLE (1 << 8)
-#define FTTMR010_TM3_CLOCK (1 << 7)
-#define FTTMR010_TM3_ENABLE (1 << 6)
-#define FTTMR010_TM2_OFENABLE (1 << 5)
-#define FTTMR010_TM2_CLOCK (1 << 4)
-#define FTTMR010_TM2_ENABLE (1 << 3)
-#define FTTMR010_TM1_OFENABLE (1 << 2)
-#define FTTMR010_TM1_CLOCK (1 << 1)
-#define FTTMR010_TM1_ENABLE (1 << 0)
-
-/*
- * Timer Interrupt State & Mask Registers
- */
-#define FTTMR010_TM3_OVERFLOW (1 << 8)
-#define FTTMR010_TM3_MATCH2 (1 << 7)
-#define FTTMR010_TM3_MATCH1 (1 << 6)
-#define FTTMR010_TM2_OVERFLOW (1 << 5)
-#define FTTMR010_TM2_MATCH2 (1 << 4)
-#define FTTMR010_TM2_MATCH1 (1 << 3)
-#define FTTMR010_TM1_OVERFLOW (1 << 2)
-#define FTTMR010_TM1_MATCH2 (1 << 1)
-#define FTTMR010_TM1_MATCH1 (1 << 0)
-
-#endif /* __FTTMR010_H */
diff --git a/include/faraday/fttmr010.h b/include/faraday/fttmr010.h
new file mode 100644
index 0000000..72abcb3
--- /dev/null
+++ b/include/faraday/fttmr010.h
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2009 Faraday Technology
+ * Po-Yu Chuang <ratb...@faraday-tech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Timer
+ */
+#ifndef __FTTMR010_H
+#define __FTTMR010_H
+
+struct fttmr010 {
+ unsigned int timer1_counter; /* 0x00 */
+ unsigned int timer1_load; /* 0x04 */
+ unsigned int timer1_match1; /* 0x08 */
+ unsigned int timer1_match2; /* 0x0c */
+ unsigned int timer2_counter; /* 0x10 */
+ unsigned int timer2_load; /* 0x14 */
+ unsigned int timer2_match1; /* 0x18 */
+ unsigned int timer2_match2; /* 0x1c */
+ unsigned int timer3_counter; /* 0x20 */
+ unsigned int timer3_load; /* 0x24 */
+ unsigned int timer3_match1; /* 0x28 */
+ unsigned int timer3_match2; /* 0x2c */
+ unsigned int cr; /* 0x30 */
+ unsigned int interrupt_state; /* 0x34 */
+ unsigned int interrupt_mask; /* 0x38 */
+};
+
+/*
+ * Timer Control Register
+ */
+#define FTTMR010_TM3_UPDOWN (1 << 11)
+#define FTTMR010_TM2_UPDOWN (1 << 10)
+#define FTTMR010_TM1_UPDOWN (1 << 9)
+#define FTTMR010_TM3_OFENABLE (1 << 8)
+#define FTTMR010_TM3_CLOCK (1 << 7)
+#define FTTMR010_TM3_ENABLE (1 << 6)
+#define FTTMR010_TM2_OFENABLE (1 << 5)
+#define FTTMR010_TM2_CLOCK (1 << 4)
+#define FTTMR010_TM2_ENABLE (1 << 3)
+#define FTTMR010_TM1_OFENABLE (1 << 2)
+#define FTTMR010_TM1_CLOCK (1 << 1)
+#define FTTMR010_TM1_ENABLE (1 << 0)
+
+/*
+ * Timer Interrupt State & Mask Registers
+ */
+#define FTTMR010_TM3_OVERFLOW (1 << 8)
+#define FTTMR010_TM3_MATCH2 (1 << 7)
+#define FTTMR010_TM3_MATCH1 (1 << 6)
+#define FTTMR010_TM2_OVERFLOW (1 << 5)
+#define FTTMR010_TM2_MATCH2 (1 << 4)
+#define FTTMR010_TM2_MATCH1 (1 << 3)
+#define FTTMR010_TM1_OVERFLOW (1 << 2)
+#define FTTMR010_TM1_MATCH2 (1 << 1)
+#define FTTMR010_TM1_MATCH1 (1 << 0)
+
+#endif /* __FTTMR010_H */
--
1.7.3.5
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