[PATCH 3/7] mtd: spi-nor: Add parallel memories support for read_sr and read_fsr

[Ashok Reddy Soma]

Add support for parallel memories flash configuration in read status
register and read flag status register functions.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.s...@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbar...@amd.com>
---

 drivers/mtd/spi/spi-nor-core.c | 50 ++++++++++++++++++++++++----------
 1 file changed, 36 insertions(+), 14 deletions(-)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 061d88b627..e733b180de 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -437,8 +437,9 @@ static ssize_t spi_nor_write_data(struct spi_nor *nor, 
loff_t to, size_t len,
 }
 
 /*
- * Read the status register, returning its value in the location
- * Return the status register value.
+ * Return the status register value. If the chip is parallel, then the
+ * read will be striped, so we should read 2 bytes to get the sr
+ * register value from both of the parallel chips.
  * Returns negative if error occurred.
  */
 static int read_sr(struct spi_nor *nor)
@@ -470,18 +471,29 @@ static int read_sr(struct spi_nor *nor)
        if (spi_nor_protocol_is_dtr(nor->reg_proto))
                op.data.nbytes = 2;
 
-       ret = spi_nor_read_write_reg(nor, &op, val);
-       if (ret < 0) {
-               pr_debug("error %d reading SR\n", (int)ret);
-               return ret;
+       if (nor->flags & SNOR_F_HAS_PARALLEL) {
+               op.data.nbytes = 2;
+               ret = spi_nor_read_write_reg(nor, &op, &val[0]);
+               if (ret < 0) {
+                       pr_debug("error %d reading SR\n", (int)ret);
+                       return ret;
+               }
+               val[0] |= val[1];
+       } else {
+               ret = spi_nor_read_write_reg(nor, &op, &val[0]);
+               if (ret < 0) {
+                       pr_debug("error %d reading SR\n", (int)ret);
+                       return ret;
+               }
        }
 
-       return *val;
+       return val[0];
 }
 
 /*
- * Read the flag status register, returning its value in the location
- * Return the status register value.
+ * Return the flag status register value. If the chip is parallel, then
+ * the read will be striped, so we should read 2 bytes to get the fsr
+ * register value from both of the parallel chips.
  * Returns negative if error occurred.
  */
 static int read_fsr(struct spi_nor *nor)
@@ -513,13 +525,23 @@ static int read_fsr(struct spi_nor *nor)
        if (spi_nor_protocol_is_dtr(nor->reg_proto))
                op.data.nbytes = 2;
 
-       ret = spi_nor_read_write_reg(nor, &op, val);
-       if (ret < 0) {
-               pr_debug("error %d reading FSR\n", ret);
-               return ret;
+       if (nor->flags & SNOR_F_HAS_PARALLEL) {
+               op.data.nbytes = 2;
+               ret = spi_nor_read_write_reg(nor, &op, &val[0]);
+               if (ret < 0) {
+                       pr_debug("error %d reading SR\n", (int)ret);
+                       return ret;
+               }
+               val[0] &= val[1];
+       } else {
+               ret = spi_nor_read_write_reg(nor, &op, &val[0]);
+               if (ret < 0) {
+                       pr_debug("error %d reading FSR\n", ret);
+                       return ret;
+               }
        }
 
-       return *val;
+       return val[0];
 }
 
 /*
-- 
2.17.1