> -----Original Message----- > From: SSunk <ssunk...@gmail.com> > Sent: Friday, August 11, 2023 4:20 PM > Subject: [PATCH] Add support for XMC > XM25QH128C/XM25QH256C/XM25QU256C/XM25QH512C/XM25QU512C > > site: https://www.xmcwh.com/site/product > > Signed-off-by: Kankan Sun <ssunk...@gmail.com> > --- > configs/evb-ast2600_defconfig | 1 + > drivers/mtd/spi/spi-nor-ids.c | 4 ++++ > 2 files changed, 5 insertions(+) > > diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig > index 9244654c82..f06c0e1fe1 100644 > --- a/configs/evb-ast2600_defconfig > +++ b/configs/evb-ast2600_defconfig > @@ -100,6 +100,7 @@ CONFIG_SPI_FLASH_SPANSION=y > CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y > CONFIG_SPI_FLASH_WINBOND=y > +CONFIG_SPI_FLASH_XMC=y > # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHY_REALTEK=y > CONFIG_PHY_NCSI=y diff --git a/drivers/mtd/spi/spi-nor-ids.c > b/drivers/mtd/spi/spi-nor-ids.c index 4587215984..80d7678293 100644 > --- a/drivers/mtd/spi/spi-nor-ids.c > +++ b/drivers/mtd/spi/spi-nor-ids.c > @@ -531,6 +531,10 @@ const struct flash_info spi_nor_ids[] = { > { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > + { INFO("XM25QH256C", 0x204019, 0, 64 * 1024, 512, SECT_4K | > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > + { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > + { INFO("XM25QH512C", 0x204020, 0, 64 * 1024, 1024, SECT_4K | > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > + { INFO("XM25QU512C", 0x204120, 0, 64 * 1024, 1024, SECT_4K | > +SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, > #endif > #ifdef CONFIG_SPI_FLASH_XTX > /* XTX Technology Limited */ > -- > 2.34.1
Reviewed-by: Chin-Ting Kuo <chin-ting_...@aspeedtech.com>