On 7/10/23 10:44, Patrick Delaunay wrote:
> CFG_STM32MP1_SCMI_SHM_SYSRAM will be disabled by default for STM32MP13x
> SoCs in next OP-TEE version and the OP-TEE SMCI server uses the OP-TEE
> native shared memory registered by clients.
>
> To be compatible by default with this configuration this patch removes
> the shared memory in the SCMI configuration and the associated reserved
> memory in SRAM.
>
> Signed-off-by: Patrick Delaunay <patrick.delau...@foss.st.com>
> ---
>
> arch/arm/dts/stm32mp13-u-boot.dtsi | 8 --------
> arch/arm/dts/stm32mp131.dtsi | 14 --------------
> 2 files changed, 22 deletions(-)
>
> diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi
> b/arch/arm/dts/stm32mp13-u-boot.dtsi
> index 726cd1a7e479..aa5cfc6e41d5 100644
> --- a/arch/arm/dts/stm32mp13-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi
> @@ -108,14 +108,6 @@
> bootph-all;
> };
>
> -&scmi_shm {
> - bootph-all;
> -};
> -
> -&scmi_sram {
> - bootph-all;
> -};
> -
> &syscfg {
> bootph-all;
> };
> diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
> index d94ba2547267..f1810c9eb704 100644
> --- a/arch/arm/dts/stm32mp131.dtsi
> +++ b/arch/arm/dts/stm32mp131.dtsi
> @@ -40,7 +40,6 @@
> #address-cells = <1>;
> #size-cells = <0>;
> linaro,optee-channel-id = <0>;
> - shmem = <&scmi_shm>;
>
> scmi_clk: protocol@14 {
> reg = <0x14>;
> @@ -106,19 +105,6 @@
> interrupt-parent = <&intc>;
> ranges;
>
> - scmi_sram: sram@2ffff000 {
> - compatible = "mmio-sram";
> - reg = <0x2ffff000 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0 0x2ffff000 0x1000>;
> -
> - scmi_shm: scmi-sram@0 {
> - compatible = "arm,scmi-shmem";
> - reg = <0 0x80>;
> - };
> - };
> -
> timers2: timer@40000000 {
> #address-cells = <1>;
> #size-cells = <0>;
Reviewed-by: Patrice Chotard <patrice.chot...@foss.st.com>
Thanks
Patrice
