[PATCH v2 4/6] phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200

[Siddharth Vadapalli]

Select the same mac divider for SGMII too as the one being used for
QSGMII.

Enable full rate divider configuration support for J721E_WIZ_10G for
SGMII.

Signed-off-by: Siddharth Vadapalli <s-vadapa...@ti.com>
---
 drivers/phy/ti/phy-j721e-wiz.c | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index 34314d0bd1..cba87f5093 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -585,12 +585,18 @@ static int wiz_reset_assert(struct reset_ctl *reset_ctl)
 
 static int wiz_phy_fullrt_div(struct wiz *wiz, int lane)
 {
-       if (wiz->type != AM64_WIZ_10G)
+       switch (wiz->type) {
+       case AM64_WIZ_10G:
+               if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)
+                       return regmap_field_write(wiz->p0_fullrt_div[lane], 
0x1);
+               break;
+       case J721E_WIZ_10G:
+               if (wiz->lane_phy_type[lane] == PHY_TYPE_SGMII)
+                       return regmap_field_write(wiz->p0_fullrt_div[lane], 
0x2);
+               break;
+       default:
                return 0;
-
-       if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)
-               return regmap_field_write(wiz->p0_fullrt_div[lane], 0x1);
-
+       }
        return 0;
 }
 
@@ -706,7 +712,8 @@ static int wiz_p_mac_div_sel(struct wiz *wiz)
        int i;
 
        for (i = 0; i < num_lanes; i++) {
-               if (wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
+               if (wiz->lane_phy_type[i] == PHY_TYPE_SGMII ||
+                   wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
                        ret = regmap_field_write(wiz->p_mac_div_sel0[i], 1);
                        if (ret)
                                return ret;
-- 
2.34.1