> Hi,
>
>
> Did you find what's caused? It seems it's not working fine with
latest yet.
> It seems that your analysis is right way.
>
> When I have tested on v2023.07-rc1, it's booting fine.
> So I did the git bisect from v2023.07-rc1 to master.
I reverted the same commit, and it successfully fixes the issue for me
as well in upstream.
The question is, if this issue affects other RISC-V based socs using the
default arch provided timer.
From my understanding, this should actually break all of them?
Best Regards,
Roland Ruckerbauer
