From: Marcel <korg...@home.nl>

sam9g45_oem cleanup phase1

sam9g45_oem cleanup phase2

sam9g45_oem cleanup phase3

Signed-off-by: Marcel <korg...@home.nl>
---
 board/in-circuit/icnova/Makefile         |   50 ++++++
 board/in-circuit/icnova/icnova_sam9g45.c |  242 ++++++++++++++++++++++++++++
 boards.cfg                               |    1 +
 include/configs/icnova_sam9g45.h         |  253 ++++++++++++++++++++++++++++++
 4 files changed, 546 insertions(+), 0 deletions(-)
 create mode 100644 board/in-circuit/icnova/Makefile
 create mode 100644 board/in-circuit/icnova/icnova_sam9g45.c
 create mode 100644 include/configs/icnova_sam9g45.h

diff --git a/board/in-circuit/icnova/Makefile b/board/in-circuit/icnova/Makefile
new file mode 100644
index 0000000..bf64680
--- /dev/null
+++ b/board/in-circuit/icnova/Makefile
@@ -0,0 +1,50 @@
+# (C) Copyright 2011 Marcel Janssen, Admesy B.V.
+# (C) Copyright 2001-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# Copyright (C) 2005-2006 Atmel Corporation
+#
+# (C) 2008 - 2010 Benjamin Tietz, In-Circuit benjamin.ti...@in-circuit.de
+# (C) 2011        Marcel Janssen, Admesy B.V.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+
+include $(TOPDIR)/config.mk
+include $(TOPDIR)/include/config.mk
+
+LIB    := $(obj)lib$(BOARD).o
+
+COBJS := icnova_sam9g45.o
+
+COBJS-y += $(COBJS)
+SRCS   := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
+
+# $(obj).depend
+$(LIB): $(OBJS)
+       $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/in-circuit/icnova/icnova_sam9g45.c 
b/board/in-circuit/icnova/icnova_sam9g45.c
new file mode 100644
index 0000000..8407b0b
--- /dev/null
+++ b/board/in-circuit/icnova/icnova_sam9g45.c
@@ -0,0 +1,242 @@
+/*
+ * (C) 2010 Benjamin Tietz, In-Circuit <benjamin.ti...@in-circuit.de>
+ *
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian....@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <exports.h>
+#include <asm/sizes.h>
+#include <asm/arch/at91sam9g45.h>
+#include <asm/arch/at91sam9_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+#include <asm/arch/hardware.h>
+#include <usb/atmel_usba_udc.h>
+#ifdef CONFIG_USBD_DFU
+#include <usb_dfu.h>
+#endif
+
+#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
+#include <net.h>
+#endif
+#include <netdev.h>
+
+#if defined(CONFIG_USB_GADGET_ATMEL_USBA) && !defined(CONFIG_USB_GADGET)
+#error "Need CONFIG_USB_GADGET when CONFIG_USB_GADGET_ATMEL_USBA enabled"
+#endif
+
+
+DECLARE_GLOBAL_DATA_PTR;
+char bootbuf[20];
+
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+struct platform_data brd = {
+       .board = {
+               .vbus_pin   = AT91_PIN_PC0,
+               .pullup_pin = 1,
+       },
+       .udc_clk = AT91SAM9G45_ID_UDPHS,
+};
+#endif
+
+#ifdef CONFIG_CMD_NAND
+static void icnova_nand_hw_init(void)
+{
+       unsigned long csa;
+
+       /* Enable CS3 */
+       csa = at91_sys_read(AT91_MATRIX_EBICSA);
+       at91_sys_write(AT91_MATRIX_EBICSA,
+                      csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
+
+       /* Configure SMC CS3 for NAND/SmartMedia */
+       at91_sys_write(AT91_SMC_SETUP(3),
+                      AT91_SMC_NWESETUP_(8) | AT91_SMC_NCS_WRSETUP_(0) |
+                      AT91_SMC_NRDSETUP_(8) | AT91_SMC_NCS_RDSETUP_(0));
+       at91_sys_write(AT91_SMC_PULSE(3),
+                      AT91_SMC_NWEPULSE_(28) | AT91_SMC_NCS_WRPULSE_(20) |
+                      AT91_SMC_NRDPULSE_(28) | AT91_SMC_NCS_RDPULSE_(20));
+       at91_sys_write(AT91_SMC_CYCLE(3),
+                      AT91_SMC_NWECYCLE_(36) | AT91_SMC_NRDCYCLE_(36));
+       at91_sys_write(AT91_SMC_MODE(3),
+                      AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+                      AT91_SMC_EXNWMODE_DISABLE |
+#ifdef CONFIG_SYS_NAND_DBW_16
+                      AT91_SMC_DBW_16 |
+#else /* CONFIG_SYS_NAND_DBW_8 */
+                      AT91_SMC_DBW_8 |
+#endif
+                      AT91_SMC_TDF_(3));
+
+       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIOC);
+
+       /* Configure RDY/BSY */
+       at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+
+       /* Enable NandFlash */
+       at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+}
+#endif
+
+
+#ifdef CONFIG_MACB
+static void icnova_arm9_macb_hw_init(void)
+{
+       /*
+        * Disable pull-up on:
+        *      RXDV (PA15) => PHY normal mode (not Test mode)
+        *      ERX0 (PA12) => PHY ADDR0
+        *      ERX1 (PA13) => PHY ADDR1
+        *      ERX2 (PA8) => PHY ADDR2
+        *      ERX3 (PA9) => PHY ADDR3
+        *      ECRS (PA29) => PHY ADDR4 => PHYADDR = 0x0
+        *      ECOL  (PA30) => full MII interface
+        *      ERXER (PA16) => no repeater
+        *      ETXCLK (PA17) => no isolate
+        */
+       unsigned long phy_mask = 0;
+       /* Reset and pdwn-pins */
+       unsigned long rst = pin_to_mask(AT91_PIN_PA27);
+       unsigned long pdwn = 0;
+       phy_mask = pin_to_mask(AT91_PIN_PA15) |
+                                pin_to_mask(AT91_PIN_PA8) |
+                                pin_to_mask(AT91_PIN_PA9) |
+                                pin_to_mask(AT91_PIN_PA12) |
+                                pin_to_mask(AT91_PIN_PA13) |
+                                pin_to_mask(AT91_PIN_PA29) |
+                                pin_to_mask(AT91_PIN_PA30) |
+                                pin_to_mask(AT91_PIN_PA16) |
+                                pin_to_mask(AT91_PIN_PA17);
+       /* Reset and pdwn-pins */
+       rst = pin_to_mask(AT91_PIN_PA26);
+       pdwn = pin_to_mask(AT91_PIN_PA25);
+       /* Enable clock */
+       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_EMAC);
+       /*
+        * Set up Pins
+        */
+       writel(rst | pdwn | phy_mask,
+              pin_to_controller(AT91_PIN_PA0) + PIO_PER);
+       writel(rst | pdwn | phy_mask,
+              pin_to_controller(AT91_PIN_PA0) + PIO_OER);
+       writel(rst | pdwn | phy_mask,
+              pin_to_controller(AT91_PIN_PA0) + PIO_CODR);
+       udelay(1000);
+       writel(rst,
+              pin_to_controller(AT91_PIN_PA0) + PIO_SODR);
+       udelay(500000);
+
+       at91_macb_hw_init();
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+#ifdef CONFIG_ICNOVA_ARM9
+       printf("Board : SAM9G45oem\n");
+#endif
+       return 0;
+}
+#endif
+
+
+#ifdef CONFIG_CMD_USB
+static void at91sam9g45_usb_hw_init(void)
+{
+       at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIODE);
+
+       at91_set_gpio_output(AT91_PIN_PC9, 0);
+       at91_set_gpio_output(AT91_PIN_PC0, 0);
+}
+#endif
+
+int board_init(void)
+{
+       /* Enable Ctrlc */
+       console_init_f();
+
+       /* the board should get it's own ID. left in for now */
+       gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G45EKES;
+
+       /* adress of boot parameters */
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+       at91_serial_hw_init();
+#ifdef CONFIG_CMD_NAND
+       icnova_nand_hw_init();
+#endif
+
+#ifdef CONFIG_MACB
+       icnova_arm9_macb_hw_init();
+#endif
+
+#ifdef CONFIG_CMD_USB
+       at91sam9g45_usb_hw_init();
+#endif
+       return 0;
+}
+
+int dram_init(void)
+{
+       gd->ram_size = get_ram_size(
+               (void *)CONFIG_SYS_SDRAM_BASE,
+               CONFIG_SYS_SDRAM_SIZE);
+       return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void reset_phy(void)
+{
+#ifdef CONFIG_MACB
+       /*
+        * Initialize ethernet HW addr prior to starting Linux,
+        * needed for nfsroot
+        * eth_init(gd->bd);
+       */
+#endif
+}
+#endif
+
+int board_eth_init(bd_t *bis)
+{
+       int rc = 0;
+
+#if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_GADGET_ATMEL_USBA)
+       rc = usba_udc_probe(&brd);
+       if (!rc)
+               rc = usb_eth_initialize(bis);
+#endif
+
+#ifdef CONFIG_MACB
+       rc = macb_eth_initialize(0, (void *)AT91SAM9G45_BASE_EMAC, 0x00);
+#endif
+
+       return rc;
+}
diff --git a/boards.cfg b/boards.cfg
index 9b34287..273f3c6 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -105,6 +105,7 @@ imx27lite                    arm         arm926ejs   
imx27lite           logicpd
 magnesium                    arm         arm926ejs   imx27lite           
logicpd        mx27
 omap5912osk                  arm         arm926ejs   -                   ti    
         omap
 edminiv2                     arm         arm926ejs   -                   LaCie 
         orion5x
+icnova_sam9g45               arm         arm926ejs   icnova              
in-circuit     at91
 ca9x4_ct_vxp                 arm         armv7       vexpress            armltd
 efikamx                      arm         armv7       efikamx             -     
         mx5
 mx51evk                      arm         armv7       mx51evk             
freescale      mx5
diff --git a/include/configs/icnova_sam9g45.h b/include/configs/icnova_sam9g45.h
new file mode 100644
index 0000000..6d1d6e8
--- /dev/null
+++ b/include/configs/icnova_sam9g45.h
@@ -0,0 +1,253 @@
+/*
+ * (C) Copyright 2010
+ * Marcel Janssen <marcel.jans...@admesy.nl>
+ *
+ * based on parts from at91sam9263ek.h
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian....@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * Configuation settings for the ICnova SAM9G45 OEM board.
+ * Moved from In-circuit configuration from u-boot-2009.11
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include <asm/arch-at91/at91sam9_sdramc.h>
+
+#define CONFIG_SYS_TEXT_BASE 0x73f00000
+
+#define CONFIG_ARM926EJS       /* This is an ARM926EJS Core */
+#define CONFIG_ICNOVA_ARM9     /* It's an  ICnova SAM9G45 OEM boardR */
+#define CONFIG_AT91SAM9G45     /* It's an Atmel AT91SAM9G45 SoC */
+#define CONFIG_AT91FAMILY
+#define CONFIG_ARCH_AT91
+#define CONFIG_AT91_LEGACY      /* needed for some defines */
+#define CONFIG_ARCH_CPU_INIT
+#undef CONFIG_USE_IRQ          /* we don't need IRQ/FIQ stuff  */
+
+#define CONFIG_CMD_EDITENV
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     12000000 /* from 12 MHz crystal */
+#define CONFIG_SYS_HZ                  1000
+
+#define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_BOOTDELAY       3
+#define CONFIG_DISPLAY_BOARDINFO       /* doesn't work properly yet */
+
+/* Command line configuration. */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_SOURCE
+#define CONFIG_CMD_NAND                1
+#define CONFIG_CMD_USB          1
+#define CONFIG_CMD_PING                1
+#define CONFIG_CMD_DHCP                1
+#define CONFIG_CMD_FLASH
+/* support FAT support for mem stick or so */
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+
+/* Hardware drivers */
+#define CONFIG_AT91_GPIO
+#define CONFIG_ATMEL_USART
+#undef CONFIG_USART0
+#undef CONFIG_USART1
+#undef CONFIG_USART2
+#define CONFIG_USART3          /* USART 3 is DBGU */
+
+/* Ethernet */
+#define CONFIG_MACB                    1
+#define CONFIG_NET_MULTI               1
+#define CONFIG_NET_RETRY_COUNT         20
+#define CONFIG_RESET_PHY_R             1
+#define CONFIG_MACB_SEARCH_PHY          1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE  1
+#define CONFIG_SYS_RX_ETH_BUFFER       1
+
+/* LED */
+#define CONFIG_STATUS_LED
+#define CONFIG_BOARD_SPECIFIC_LED
+#define CONFIG_AT91_LED
+#define        CONFIG_RED_LED                  AT91_PIN_PA22
+#define        CONFIG_GREEN_LED                AT91_PIN_PA23
+
+#define STATUS_LED_RED                 0
+#define STATUS_LED_GREEN               1
+/* Red */
+#define STATUS_LED_BIT                 STATUS_LED_RED
+#define STATUS_LED_STATE               STATUS_LED_OFF
+#define STATUS_LED_PERIOD              (CONFIG_SYS_HZ / 2)
+/* Green */
+#define STATUS_LED_BIT1                        STATUS_LED_GREEN
+#define STATUS_LED_STATE1              STATUS_LED_OFF
+#define STATUS_LED_PERIOD1             (CONFIG_SYS_HZ / 2)
+
+/* USB Host */
+#define CONFIG_USB_ATMEL
+#define CONFIG_USB_OHCI_NEW                    1
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_SYS_USB_OHCI_REGS_BASE  0x00700000
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME  "at91sam9g45"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     1
+#define CONFIG_DOS_PARTITION
+#define CONFIG_USB_STORAGE
+
+/* USB gadget support for Ethernet over USB */
+#define CONFIG_USB_GADGET              1
+#define CONFIG_USB_GADGET_ATMEL_USBA    1
+#define CONFIG_USB_GADGET_DUALSPEED    1
+/* only one of these can be active                             */
+/* You can have only Ethernet or DFU via USB, not both for now */
+/* #define CONFIG_USB_ETHER            1                       */
+#define CONFIG_USBD_DFU                 1
+
+#ifdef CONFIG_USBD_DFU
+#define CONFIG_USBD_VENDORID           0x23CF     /* Admesy */
+#define CONFIG_USBD_PRODUCTID_DFU       0x0100     /* donated for u-boot DFU */
+#define CONFIG_USBD_MANUFACTURER       "Admesy"
+#define CONFIG_USBD_PRODUCT_NAME       "Admesy ICNOVA DFU"
+#define CONFIG_USBD_DFU_XFER_SIZE      4096
+#define CONFIG_USBD_DFU_INTERFACE       0
+#define DFU_NUM_ALTERNATES             3          /* 3 partitions */
+#define LOAD_ADDR ((unsigned char *)0x70400000)    /* RAM address for dnload */
+#endif
+
+#ifdef CONFIG_USB_ETHER
+#define CONFIG_USBD_MANUFACTURER       "Armzone"
+#define CONFIG_USBD_PRODUCT_NAME       "DFU Bootloader " U_BOOT_VERSION
+#define CONFIG_EXTRA_ENV_SETTINGS      "usbtty=cdc_acm\0"
+#define CONFIG_USBD_DFU_XFER_SIZE      4096
+#define CONFIG_USBD_DFU_INTERFACE       2
+#define CONFIG_USBD_VENDORID           0x1457     /* Linux/NetChip */
+#define CONFIG_USBD_PRODUCTID_GSERIAL  0x5120     /* gserial */
+#define CONFIG_USBD_PRODUCTID_CDCACM   0x511d     /* CDC ACM */
+#define CONFIG_USBNET_MANUFACTURER      "usba_udc" /* "Atmel AT91SAM9G45" */
+#define CONFIG_USBNET_DEV_ADDR         "00:1f:e5:00:1c:7c"
+#define CONFIG_USBNET_HOST_ADDR                "0a:fa:63:8b:e8:0a"
+#define CONFIG_USB_CDC_VENDOR_ID        0x0525
+#define CONFIG_USB_CDC_PRODUCT_ID       0xa4a1
+#define CONFIG_USB_RNDIS_VENDOR_ID      0x0525
+#define CONFIG_USB_RNDIS_PRODUCT_ID     0xa4a2
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
+#endif
+
+/*
+ * SDRAM: 1 bank, min 32, max 128 MB
+ * Initialized before u-boot gets started.
+ */
+#define CONFIG_NR_DRAM_BANKS           1
+#define CONFIG_SYS_SDRAM_SIZE          0x08000000   /* 128 megs */
+#define CONFIG_SYS_MEMTEST_START       CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_MEMTEST_START \
+                                       + CONFIG_SYS_SDRAM_SIZE)
+#define CONFIG_SYS_ALT_MEMTEST
+#define CONFIG_SYS_LOAD_ADDR \
+       (CONFIG_SYS_SDRAM_BASE + 0x00400000)
+#define CONFIG_SYS_BOOTPARAMS_LEN      (16 * 1024)
+/* additions for new relocation code */
+#define CONFIG_SYS_SDRAM_BASE          0x70000000
+#define IRAM_BASE_ADDR                 0x00300000
+#define IRAM_SIZE                      0x00010000
+#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - \
+                                       GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + \
+                                       CONFIG_SYS_GBL_DATA_OFFSET)
+
+#define CONFIG_SYS_MALLOC_LEN          (256*1024)
+
+/* NAND flash */
+#define CONFIG_NAND_ATMEL
+#define CONFIG_CMD_MTDPARTS            1
+#define CONFIG_MTD_DEVICE              1
+#define CONFIG_NAND_MAX_CHIPS          1
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#define CONFIG_SYS_NAND_BASE           0x40000000
+#define CONFIG_SYS_NAND_DBW_8          1
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC8
+#define CONFIG_SYS_NAND_READY_PIN      AT91_PIN_PC11
+
+/* NOR flash - holds At91bootstrap (sect 1)+u-boot(sec 2-...)+env(sector7) */
+#define CONFIG_CMD_JFFS2                         1
+#define CONFIG_CMD_FLASH
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER                  1
+#define CONFIG_SYS_FLASH_BASE                    0x10000000
+#define CONFIG_SYS_FLASH_SIZE                    0x00100000
+#define CONFIG_SYS_MAX_FLASH_BANKS               1
+#define CONFIG_SYS_FLASH_SECT                    8
+#define CONFIG_SYS_MAX_FLASH_SECT                8
+
+#define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_MONITOR_SEC         1:0-7
+#define CONFIG_ENV_IS_IN_FLASH         1
+#define CONFIG_ENV_SIZE                (CONFIG_SYS_FLASH_SIZE / 
CONFIG_SYS_FLASH_SECT)
+#define CONFIG_ENV_ADDR                (CONFIG_SYS_FLASH_BASE + 0x000E0000)
+
+/* Some default env stuff */
+#define MTDIDS_DEFAULT         "nand0=nand.0"
+#define MTDPARTS_DEFAULT        "mtdparts=nand.0:2M(kernel),16M(root),-(Data)"
+#undef CONFIG_BOOTARGS
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTARGS                "root=1F01 rootfstype=jffs2"
+#define CONFIG_BOOTCOMMAND     "mtdparts default; nand read 0x71000000 \
+                                nand0,0; bootm 0x71000000"
+
+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_SYS_BAUDRATE_TABLE      {115200 , 19200, 38400, 57600, 9600  }
+
+#define CONFIG_SYS_PROMPT              "Sam9g45> "
+#define CONFIG_SYS_CBSIZE              256
+#define CONFIG_SYS_MAXARGS             16
+#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
+                                       sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP            1
+#define CONFIG_CMDLINE_EDITING         1
+#define CONFIG_AUTO_COMPLETE           1
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_GBL_DATA_SIZE       128 /* 128 bytes for initial data */
+
+#define CONFIG_STACKSIZE               (16*2048)       /* regular stack */
+
+#ifdef CONFIG_USE_IRQ
+#error CONFIG_USE_IRQ not supported
+#endif
+
+#endif
-- 
1.7.3.4

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