Intel Agilex5 is a midrange FPGAs optimized for applications requiring high
performance,
lower power, and smaller form factors and lower logic densities. U-Boot is one
of the
bootloader to boot along with ARM trusted Firmware to boot the board up.
*** BLURB HERE ***
Jit Loon Lim (16):
arch: arm: update kconfig for new platform agilex5
arch: arm: dts: add dts and dtsi for new platform agilex5
arch: arm: mach-socfpga: add new platform agilex5 mach-socfpga
enablement
arch: arm: mach-socfpga: include: mach: add new platform agilex5
mach-socfpga enablement
board: intel: add new platform agilex5 socdk
configs: add new platform agilex5 defconfig
doc: device-tree-bindings: misc: add secreg text file for agilex5
drivers: ddr: altera: add ddr support for agilex5
drivers: clk: altera: add clock support for agilex5
drivers: misc: update driver misc for agilex5
drivers: mmc: add mmc/cadence driver for agilex5
drivers: phy: add combo phy driver for agilex5
drivers: reset: add reset driver for agilex5
drivers: sysreset: add system driver for agilex5
drivers: watchdog: update watchdog driver for agilex5
includes: add and update configuration for agilex5
Sieu Mun Tang (1):
tools: binman: update binman tool for agilex5
arch/arm/Kconfig | 5 +-
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_agilex5-u-boot.dtsi | 459 ++++++++++
arch/arm/dts/socfpga_agilex5.dtsi | 634 +++++++++++++
.../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi | 131 +++
arch/arm/dts/socfpga_agilex5_socdk.dts | 165 ++++
arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi | 38 +-
arch/arm/dts/socfpga_soc64_u-boot.dtsi | 120 +++
arch/arm/dts/socfpga_stratix10.dtsi | 0
.../dts/socfpga_stratix10_socdk-u-boot.dtsi | 0
arch/arm/dts/socfpga_stratix10_socdk.dts | 0
arch/arm/mach-socfpga/Kconfig | 92 ++
arch/arm/mach-socfpga/Makefile | 69 +-
arch/arm/mach-socfpga/board.c | 65 +-
arch/arm/mach-socfpga/clock_manager_agilex5.c | 82 ++
arch/arm/mach-socfpga/firewall.c | 107 ---
.../include/mach/base_addr_soc64.h | 43 +-
.../mach-socfpga/include/mach/clock_manager.h | 5 +-
.../include/mach/clock_manager_agilex5.h | 12 +
arch/arm/mach-socfpga/include/mach/firewall.h | 42 +-
.../mach-socfpga/include/mach/handoff_soc64.h | 25 +-
.../mach-socfpga/include/mach/mailbox_s10.h | 32 +-
.../include/mach/reset_manager_soc64.h | 33 +-
.../mach-socfpga/include/mach/smmu_agilex5.h | 30 +
arch/arm/mach-socfpga/include/mach/smmu_s10.h | 73 ++
.../include/mach/system_manager_soc64.h | 126 ++-
arch/arm/mach-socfpga/include/mach/timer.h | 30 +
arch/arm/mach-socfpga/lowlevel_init_agilex5.S | 61 ++
arch/arm/mach-socfpga/lowlevel_init_soc64.S | 167 +++-
arch/arm/mach-socfpga/mailbox_s10.c | 21 +
arch/arm/mach-socfpga/misc.c | 19 +-
arch/arm/mach-socfpga/misc_soc64.c | 33 +-
arch/arm/mach-socfpga/mmu-arm64_s10.c | 43 +-
arch/arm/mach-socfpga/reset_manager_s10.c | 271 +++++-
arch/arm/mach-socfpga/secure_reg_helper.c | 4 +-
arch/arm/mach-socfpga/smmu_agilex5.c | 34 +
arch/arm/mach-socfpga/smmu_s10.c | 126 +++
arch/arm/mach-socfpga/spl_agilex5.c | 180 ++++
arch/arm/mach-socfpga/spl_soc64.c | 188 +++-
arch/arm/mach-socfpga/u-boot-spl-soc64.lds | 93 ++
arch/arm/mach-socfpga/wrap_handoff_soc64.c | 7 +-
board/intel/agilex5-socdk/MAINTAINERS | 8 +
board/intel/agilex5-socdk/Makefile | 7 +
board/intel/agilex5-socdk/socfpga.c | 7 +
configs/socfpga_agilex5_defconfig | 125 +++
configs/socfpga_agilex5_legacy_defconfig | 87 ++
.../misc/socfpga_secreg.txt | 397 ++++++++
drivers/clk/altera/Makefile | 1 +
drivers/clk/altera/clk-agilex5.c | 736 +++++++++++++++
drivers/clk/altera/clk-agilex5.h | 263 ++++++
drivers/ddr/altera/Makefile | 5 +-
drivers/ddr/altera/iossm_mailbox.c | 786 ++++++++++++++++
drivers/ddr/altera/iossm_mailbox.h | 141 +++
drivers/ddr/altera/sdram_agilex5.c | 329 +++++++
drivers/ddr/altera/sdram_soc64.c | 78 +-
drivers/ddr/altera/sdram_soc64.h | 17 +-
drivers/misc/Kconfig | 9 +
drivers/misc/Makefile | 1 +
drivers/misc/socfpga_secreg.c | 116 +++
drivers/mmc/mmc.c | 27 +-
drivers/mmc/sdhci-cadence.c | 164 +++-
drivers/phy/cadence/Kconfig | 9 +
drivers/phy/cadence/Makefile | 1 +
drivers/phy/cadence/phy-cadence-combophy.c | 855 ++++++++++++++++++
drivers/reset/reset-socfpga.c | 28 +-
drivers/sysreset/Kconfig | 7 +
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_socfpga_agilex5.c | 44 +
drivers/watchdog/Kconfig | 2 +-
include/configs/socfpga_agilex5_socdk.h | 12 +
include/configs/socfpga_soc64_common.h | 214 ++++-
include/dt-bindings/clock/agilex5-clock.h | 71 ++
include/dt-bindings/reset/altr,rst-mgr-agx5.h | 82 ++
tools/binman/control.py | 8 +-
74 files changed, 8019 insertions(+), 285 deletions(-)
create mode 100644 arch/arm/dts/socfpga_agilex5-u-boot.dtsi
create mode 100644 arch/arm/dts/socfpga_agilex5.dtsi
create mode 100644 arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi
create mode 100644 arch/arm/dts/socfpga_agilex5_socdk.dts
create mode 100644 arch/arm/dts/socfpga_soc64_u-boot.dtsi
mode change 100755 => 100644 arch/arm/dts/socfpga_stratix10.dtsi
mode change 100755 => 100644 arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi
mode change 100755 => 100644 arch/arm/dts/socfpga_stratix10_socdk.dts
create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex5.c
delete mode 100644 arch/arm/mach-socfpga/firewall.c
create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h
create mode 100644 arch/arm/mach-socfpga/include/mach/smmu_agilex5.h
create mode 100644 arch/arm/mach-socfpga/include/mach/smmu_s10.h
create mode 100644 arch/arm/mach-socfpga/lowlevel_init_agilex5.S
create mode 100644 arch/arm/mach-socfpga/smmu_agilex5.c
create mode 100644 arch/arm/mach-socfpga/smmu_s10.c
create mode 100644 arch/arm/mach-socfpga/spl_agilex5.c
create mode 100644 arch/arm/mach-socfpga/u-boot-spl-soc64.lds
create mode 100644 board/intel/agilex5-socdk/MAINTAINERS
create mode 100644 board/intel/agilex5-socdk/Makefile
create mode 100644 board/intel/agilex5-socdk/socfpga.c
create mode 100644 configs/socfpga_agilex5_defconfig
create mode 100644 configs/socfpga_agilex5_legacy_defconfig
create mode 100644 doc/device-tree-bindings/misc/socfpga_secreg.txt
create mode 100644 drivers/clk/altera/clk-agilex5.c
create mode 100644 drivers/clk/altera/clk-agilex5.h
create mode 100644 drivers/ddr/altera/iossm_mailbox.c
create mode 100644 drivers/ddr/altera/iossm_mailbox.h
create mode 100644 drivers/ddr/altera/sdram_agilex5.c
create mode 100644 drivers/misc/socfpga_secreg.c
create mode 100644 drivers/phy/cadence/phy-cadence-combophy.c
create mode 100644 drivers/sysreset/sysreset_socfpga_agilex5.c
create mode 100644 include/configs/socfpga_agilex5_socdk.h
create mode 100644 include/dt-bindings/clock/agilex5-clock.h
create mode 100644 include/dt-bindings/reset/altr,rst-mgr-agx5.h
--
2.26.2
