Hi, Sam, Thank you for this series! I tested it on my T113s board and got the second core worked.
Here is some kernel log: [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: Using PSCI v0.1 Function IDs from DT [ 0.120000] CPU: Testing write buffer coherency: ok [ 0.120000] /cpus/cpu@0 missing clock-frequency property [ 0.120000] /cpus/cpu@1 missing clock-frequency property [ 0.120000] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 [ 0.120000] Setting up static identity map for 0x40100000 - 0x40100060 [ 0.120000] rcu: Hierarchical SRCU implementation. [ 0.120000] rcu: Max phase no-delay instances is 1000. [ 0.120000] smp: Bringing up secondary CPUs ... [ 0.170000] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 [ 0.180000] smp: Brought up 1 node, 2 CPUs [ 0.180000] SMP: Total of 2 processors activated (1149.33 BogoMIPS). [ 0.180000] CPU: All CPU(s) started in SVC mode. Tested-by: Maksim Kiselev <biguncle...@gmail.com>
