Use am642-evm.dts to represent the Board and selectively
enable/override the configurations necessary. And since
am642-evm-u-boot.dtsi also needs to setup common properties, instead
of re-inventing everything, just reuse the definitions.
Signed-off-by: Nishanth Menon <n...@ti.com>
---
arch/arm/dts/k3-am642-r5-evm.dts | 203 +++++--------------------------
1 file changed, 29 insertions(+), 174 deletions(-)
diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts
index ca5ce4a35a5c..140dd90fbdf1 100644
--- a/arch/arm/dts/k3-am642-r5-evm.dts
+++ b/arch/arm/dts/k3-am642-r5-evm.dts
@@ -5,29 +5,18 @@
/dts-v1/;
-#include "k3-am642.dtsi"
+#include "k3-am642-evm.dts"
#include "k3-am64-evm-ddr4-1600MTs.dtsi"
#include "k3-am64-ddr.dtsi"
-/ {
- chosen {
- stdout-path = "serial2:115200n8";
- tick-timer = &timer1;
- };
+#include "k3-am642-evm-u-boot.dtsi"
+/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
- memory@80000000 {
- device_type = "memory";
- /* 2G RAM */
- reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
-
- bootph-pre-ram;
- };
-
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x00 0x00a90000 0x00 0x10>;
@@ -44,34 +33,12 @@
bootph-pre-ram;
};
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- secure_ddr: optee@9e800000 {
- reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE
*/
- alignment = <0x1000>;
- no-map;
- };
- };
-
clk_200mhz: dummy-clock-200mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
bootph-pre-ram;
};
-
- vtt_supply: vtt-supply {
- compatible = "regulator-gpio";
- regulator-name = "vtt";
- regulator-min-microvolt = <0>;
- regulator-max-microvolt = <3300000>;
- gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
- states = <0 0x0 3300000 0x1>;
- bootph-pre-ram;
- };
};
&cbass_main {
@@ -81,9 +48,8 @@
mbox-names = "tx", "rx";
bootph-pre-ram;
};
-};
-&cbass_main {
+ /* XXX: Upstream kernel TODO: send upstream */
main_esm: esm@420000 {
compatible = "ti,j721e-esm";
reg = <0x0 0x420000 0x0 0x1000>;
@@ -94,6 +60,8 @@
&cbass_mcu {
bootph-pre-ram;
+
+ /* XXX: Upstream kernel TODO: send upstream */
mcu_esm: esm@4100000 {
compatible = "ti,j721e-esm";
reg = <0x0 0x4100000 0x0 0x1000>;
@@ -102,115 +70,8 @@
};
};
-&main_pmx0 {
- bootph-pre-ram;
- main_uart0_pins_default: main-uart0-pins-default {
- bootph-pre-ram;
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0238, PIN_INPUT, 0) /*
(B16) UART0_CTSn */
- AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /*
(A16) UART0_RTSn */
- AM64X_IOPAD(0x0230, PIN_INPUT, 0) /*
(D15) UART0_RXD */
- AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /*
(C16) UART0_TXD */
- >;
- };
-
- main_uart1_pins_default: main-uart1-pins-default {
- bootph-pre-ram;
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0248, PIN_INPUT, 0) /*
(D16) UART1_CTSn */
- AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /*
(E16) UART1_RTSn */
- AM64X_IOPAD(0x0240, PIN_INPUT, 0) /*
(E15) UART1_RXD */
- AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /*
(E14) UART1_TXD */
- >;
- };
-
- main_mmc0_pins_default: main-mmc0-pins-default {
- bootph-pre-ram;
- pinctrl-single,pins = <
- AM64X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /*
(B25) MMC0_CLK */
- AM64X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /*
(B27) MMC0_CMD */
- AM64X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /*
(A26) MMC0_DAT0 */
- AM64X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /*
(E25) MMC0_DAT1 */
- AM64X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /*
(C26) MMC0_DAT2 */
- AM64X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /*
(A25) MMC0_DAT3 */
- AM64X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /*
(E24) MMC0_DAT4 */
- AM64X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /*
(A24) MMC0_DAT5 */
- AM64X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /*
(B26) MMC0_DAT6 */
- AM64X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /*
(D25) MMC0_DAT7 */
- AM64X_IOPAD(0x01b0, PIN_INPUT, 0) /*
(C25) MMC0_DS */
- >;
- };
-
- main_mmc1_pins_default: main-mmc1-pins-default {
- bootph-pre-ram;
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /*
(J19) MMC1_CMD */
- AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /*
(L20) MMC1_CLK */
- AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /*
(K21) MMC1_DAT0 */
- AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /*
(L21) MMC1_DAT1 */
- AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /*
(K19) MMC1_DAT2 */
- AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /*
(K18) MMC1_DAT3 */
- AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /*
(D19) MMC1_SDCD */
- AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /*
(C20) MMC1_SDWP */
- >;
- };
-
- ddr_vtt_pins_default: ddr-vtt-pins-default {
- bootph-pre-ram;
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /*
(L18) OSPI0_CSN1.GPIO0_12 */
- >;
- };
-
- main_usb0_pins_default: main-usb0-pins-default {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19)
USB0_DRVVBUS */
- >;
- };
-
- mdio1_pins_default: mdio1-pins-default {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2)
PRG0_PRU1_GPO19.MDIO0_MDC */
- AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5)
PRG0_PRU1_GPO18.MDIO0_MDIO */
- >;
- };
-
- rgmii1_pins_default: rgmii1-pins-default {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5)
PRG0_PRU1_GPO7.RGMII1_RD0 */
- AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5)
PRG0_PRU1_GPO9.RGMII1_RD1 */
- AM64X_IOPAD(0x01d8, PIN_INPUT, 4) /* (V6)
PRG0_PRU1_GPO10.RGMII1_RD2 */
- AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5)
PRG0_PRU1_GPO17.RGMII1_RD3 */
- AM64X_IOPAD(0x0188, PIN_INPUT, 4) /* (AA5)
PRG0_PRU0_GPO10.RGMII1_RXC */
- AM64X_IOPAD(0x0184, PIN_INPUT, 4) /* (W6)
PRG0_PRU0_GPO9.RGMII1_RX_CTL */
- AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15)
PRG1_PRU1_GPO7.RGMII1_TD0 */
- AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14)
PRG1_PRU1_GPO9.RGMII1_TD1 */
- AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14)
PRG1_PRU1_GPO10.RGMII1_TD2 */
- AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14)
PRG1_PRU1_GPO17.RGMII1_TD3 */
- AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14)
PRG1_PRU0_GPO10.RGMII1_TXC */
- AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15)
PRG1_PRU0_GPO9.RGMII1_TX_CTL */
- >;
- };
-
- rgmii2_pins_default: rgmii2-pins-default {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11)
PRG1_PRU1_GPO0.RGMII2_RD0 */
- AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11)
PRG1_PRU1_GPO1.RGMII2_RD1 */
- AM64X_IOPAD(0x0110, PIN_INPUT, 4) /* (AA12)
PRG1_PRU1_GPO2.RGMII2_RD2 */
- AM64X_IOPAD(0x0114, PIN_INPUT, 4) /* (Y12)
PRG1_PRU1_GPO3.RGMII2_RD3 */
- AM64X_IOPAD(0x0120, PIN_INPUT, 4) /* (U11)
PRG1_PRU1_GPO6.RGMII2_RXC */
- AM64X_IOPAD(0x0118, PIN_INPUT, 4) /* (W12)
PRG1_PRU1_GPO4.RGMII2_RX_CTL */
- AM64X_IOPAD(0x0134, PIN_OUTPUT, 4) /* (AA10)
PRG1_PRU1_GPO11.RGMII2_TD0 */
- AM64X_IOPAD(0x0138, PIN_OUTPUT, 4) /* (V10)
PRG1_PRU1_GPO12.RGMII2_TD1 */
- AM64X_IOPAD(0x013c, PIN_OUTPUT, 4) /* (U10)
PRG1_PRU1_GPO13.RGMII2_TD2 */
- AM64X_IOPAD(0x0140, PIN_OUTPUT, 4) /* (AA11)
PRG1_PRU1_GPO14.RGMII2_TD3 */
- AM64X_IOPAD(0x0148, PIN_OUTPUT, 4) /* (Y10)
PRG1_PRU1_GPO16.RGMII2_TXC */
- AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11)
PRG1_PRU1_GPO15.RGMII2_TX_CTL */
- >;
- };
-};
-
&dmsc {
+ bootph-pre-ram;
mboxes= <&secure_proxy_main 0>,
<&secure_proxy_main 1>,
<&secure_proxy_main 0>;
@@ -219,19 +80,35 @@
ti,secure-host;
};
+&ddr_vtt_pins_default {
+ bootph-pre-ram;
+};
+
+&vtt_supply {
+ bootph-pre-ram;
+};
+
+/* EEPROM might be read before SYSFW is available */
+&main_i2c0 {
+ /delete-property/ power-domains;
+};
+
&main_uart0 {
+ /* Clocked by default */
/delete-property/ power-domains;
/delete-property/ clocks;
/delete-property/ clock-names;
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart0_pins_default>;
- status = "okay";
+};
+
+&main_uart1_pins_default {
+ bootph-pre-ram;
};
&main_uart1 {
bootph-pre-ram;
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
+ status = "okay";
};
&memorycontroller {
@@ -241,43 +118,21 @@
};
&sdhci0 {
+ /* Clocked by default */
/delete-property/ power-domains;
clocks = <&clk_200mhz>;
clock-names = "clk_xin";
- ti,driver-strength-ohm = <50>;
- disable-wp;
- pinctrl-0 = <&main_mmc0_pins_default>;
};
&sdhci1 {
+ /* Clocked by default */
/delete-property/ power-domains;
clocks = <&clk_200mhz>;
clock-names = "clk_xin";
- ti,driver-strength-ohm = <50>;
- disable-wp;
- pinctrl-0 = <&main_mmc1_pins_default>;
};
&main_gpio0 {
bootph-pre-ram;
+ /* Clocked by default */
/delete-property/ power-domains;
};
-
-/* EEPROM might be read before SYSFW is available */
-&main_i2c0 {
- /delete-property/ power-domains;
-};
-
-&usbss0 {
- ti,vbus-divider;
- ti,usb2-only;
-};
-
-&usb0 {
- dr_mode = "otg";
- maximum-speed = "high-speed";
- pinctrl-names = "default";
- pinctrl-0 = <&main_usb0_pins_default>;
-};
-
-#include "k3-am642-evm-u-boot.dtsi"
--
2.40.0
