From: Tero Kristo <t-kri...@ti.com>
Main domain ESM support is needed to configure main domain watchdogs
to generate ESM pin events by default. On J7 processor board these
propagate to the PMIC to generate a reset when watchdog expires.
Signed-off-by: Tero Kristo <t-kri...@ti.com>
Signed-off-by: Neha Malcom Francis <n-fran...@ti.com>
---
arch/arm/dts/k3-j721e.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/k3-j721e.dtsi b/arch/arm/dts/k3-j721e.dtsi
index f0587fde14..d7f73f61db 100644
--- a/arch/arm/dts/k3-j721e.dtsi
+++ b/arch/arm/dts/k3-j721e.dtsi
@@ -126,6 +126,7 @@
#size-cells = <2>;
ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /*
ctrl mmr */
<0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /*
GPIO */
+ <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /*
ESM */
<0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /*
serdes */
<0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /*
timesync router */
<0x00 0x06000000 0x00 0x06000000 0x00 0x00400000>, /*
USBSS0 */
--
2.34.1
