Vendor H616 DRAM code always configure part which we call ODT configuration. Let's reflect that here too.
Signed-off-by: Jernej Skrabec <jernej.skra...@gmail.com> --- arch/arm/mach-sunxi/Kconfig | 2 +- arch/arm/mach-sunxi/dram_sun50i_h616.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 1b47a49f938c..4300d388e066 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -488,12 +488,12 @@ config DRAM_ZQ config DRAM_ODT_EN bool "sunxi dram odt enable" + depends on !MACH_SUN50I_H616 default y if MACH_SUN8I_A23 default y if MACH_SUNXI_H3_H5 default y if MACH_SUN8I_R40 default y if MACH_SUN50I default y if MACH_SUN50I_H6 - default y if MACH_SUN50I_H616 ---help--- Select this to enable dram odt (on die termination). diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c index 630c7c3be882..7d2434309b07 100644 --- a/arch/arm/mach-sunxi/dram_sun50i_h616.c +++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c @@ -736,8 +736,7 @@ static bool mctl_phy_init(struct dram_para *para) writel(0x80, SUNXI_DRAM_PHY0_BASE + 0x3dc); writel(0x80, SUNXI_DRAM_PHY0_BASE + 0x45c); - if (IS_ENABLED(CONFIG_DRAM_ODT_EN)) - mctl_phy_configure_odt(para); + mctl_phy_configure_odt(para); clrsetbits_le32(SUNXI_DRAM_PHY0_BASE + 4, 7, 0xa); -- 2.40.0