[PATCH v5 32/44] x86: Fix up use of X86_32BIT_INIT and X86_64 options

[Simon Glass]

Drop the invalid SPL_ in a CONFIG_IS_ENABLED() usage. Use the correct
X86_64 option in msr.h since SPL may be 32-bit when U-Bout proper is
not.

Signed-off-by: Simon Glass <s...@chromium.org>
---

(no changes since v4)

Changes in v4:
- Reduce and rename commit

 arch/x86/cpu/qemu/qemu.c   | 2 +-
 arch/x86/include/asm/msr.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index e54082df7f9..274978c023b 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -97,7 +97,7 @@ static void qemu_chipset_init(void)
        }
 }
 
-#if !CONFIG_IS_ENABLED(SPL_X86_32BIT_INIT)
+#if CONFIG_IS_ENABLED(X86_32BIT_INIT)
 int arch_cpu_init(void)
 {
        post_code(POST_CPU_INIT);
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 27764fc56cb..eb3ddde8c07 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -59,7 +59,7 @@ static inline unsigned long long native_read_tscp(unsigned 
int *aux)
  * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
  * it means rax *or* rdx.
  */
-#ifdef CONFIG_X86_64
+#if CONFIG_IS_ENABLED(X86_64)
 #define DECLARE_ARGS(val, low, high)   unsigned low, high
 #define EAX_EDX_VAL(val, low, high)    ((low) | ((u64)(high) << 32))
 #define EAX_EDX_ARGS(val, low, high)   "a" (low), "d" (high)
-- 
2.39.2.637.g21b0678d19-goog