> From: Peter Yu-Chien Lin(林宇謙) <peter...@andestech.com> > Sent: Monday, February 06, 2023 4:11 PM > To: u-boot@lists.denx.de > Cc: Leo Yu-Chi Liang(梁育齊) <ycli...@andestech.com>; Rick Jian-Zhi Chen(陳建志) > <r...@andestech.com>; prabhakar.cse...@gmail.com; Peter Yu-Chien Lin(林宇謙) > <peter...@andestech.com> > Subject: [PATCH v2 07/10] configs: ae350: Enable v5l2 cache for AE350 > platforms in SPL > > To reduce the code size, CONFIG_V5L2_CACHE was disabled since commit: > ca06444aac2c643db3a3f2eb37afc60fae15177e > > Turing on does not significantly increase the size of u-boot-spl.bin, so we > enable it by default to improve performance. > > Signed-off-by: Yu Chien Peter Lin <peter...@andestech.com> > Reviewed-by: Leo Yu-Chi Liang <ycli...@andestech.com> > --- > arch/riscv/cpu/ax25/Kconfig | 1 + > configs/ae350_rv32_spl_defconfig | 2 ++ > configs/ae350_rv32_spl_xip_defconfig | 2 ++ > configs/ae350_rv64_spl_defconfig | 2 ++ > configs/ae350_rv64_spl_xip_defconfig | 2 ++ > 5 files changed, 9 insertions(+)
Reviewed-by: Rick Chen <r...@andestech.com>