Signed-off-by: Daniel Gorsulowski <daniel.gorsulow...@esd.eu>
---

There is still a bug in USART config. This patch is for reviewing only!

 board/esd/meesc/config.mk  |    1 -
 board/esd/meesc/meesc.c    |   39 +++++-----
 board/esd/otc570/config.mk |    1 -
 board/esd/otc570/otc570.c  |   51 +++++++------
 boards.cfg                 |    6 +-
 include/configs/meesc.h    |  150 ++++++++++++++++++++++---------------
 include/configs/otc570.h   |  179 +++++++++++++++++++++++++-------------------
 7 files changed, 241 insertions(+), 186 deletions(-)
 delete mode 100644 board/esd/meesc/config.mk
 delete mode 100644 board/esd/otc570/config.mk

diff --git a/board/esd/meesc/config.mk b/board/esd/meesc/config.mk
deleted file mode 100644
index 2077692..0000000
--- a/board/esd/meesc/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x21f00000
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
index 41fa3e1..46cd33c 100644
--- a/board/esd/meesc/meesc.c
+++ b/board/esd/meesc/meesc.c
@@ -3,7 +3,7 @@
  * Stelian Pop <stelian....@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
- * (C) Copyright 2009-2010
+ * (C) Copyright 2009-2011
  * Daniel Gorsulowski <daniel.gorsulow...@esd.eu>
  * esd electronic system design gmbh <www.esd.eu>
  *
@@ -27,6 +27,7 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <asm/arch/at91sam9263.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
@@ -36,7 +37,6 @@
 #include <asm/arch/at91_pio.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
 #include <netdev.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -67,8 +67,8 @@ int get_hw_rev(void)
 static void meesc_nand_hw_init(void)
 {
        unsigned long csa;
-       at91_smc_t      *smc    = (at91_smc_t *) AT91_SMC0_BASE;
-       at91_matrix_t   *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
+       at91_smc_t      *smc    = (at91_smc_t *) ATMEL_BASE_SMC0;
+       at91_matrix_t   *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
 
        /* Enable CS3 */
        csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
@@ -88,7 +88,7 @@ static void meesc_nand_hw_init(void)
        writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
                AT91_SMC_MODE_EXNW_DISABLE |
                AT91_SMC_MODE_DBW_8 |
-               AT91_SMC_MODE_TDF_CYCLE(2),
+               AT91_SMC_MODE_TDF_CYCLE(3),
                &smc->cs[3].mode);
 
        /* Configure RDY/BSY */
@@ -102,9 +102,9 @@ static void meesc_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void meesc_macb_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
        /* Enable clock */
-       writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer);
+       writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
        at91_macb_hw_init();
 }
 #endif
@@ -117,7 +117,7 @@ static void meesc_macb_hw_init(void)
  */
 static void meesc_ethercat_hw_init(void)
 {
-       at91_smc_t      *smc1   = (at91_smc_t *) AT91_SMC1_BASE;
+       at91_smc_t      *smc1   = (at91_smc_t *) ATMEL_BASE_SMC1;
 
        /* Configure SMC EBI1_CS0 for EtherCAT */
        writel(AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) |
@@ -142,8 +142,9 @@ static void meesc_ethercat_hw_init(void)
 
 int dram_init(void)
 {
-       gd->bd->bi_dram[0].start = PHYS_SDRAM;
-       gd->bd->bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 << 27));
+       gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+       gd->bd->bi_dram[0].size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE,
+                                       (1 << 27));
        return 0;
 }
 
@@ -151,7 +152,7 @@ int board_eth_init(bd_t *bis)
 {
        int rc = 0;
 #ifdef CONFIG_MACB
-       rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x00);
+       rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
 #endif
        return rc;
 }
@@ -225,7 +226,7 @@ int misc_init_r(void)
 {
        char            *str;
        char            buf[32];
-       at91_pmc_t      *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
 
        /*
         * Normally the processor clock has a divisor of 2.
@@ -248,22 +249,22 @@ int misc_init_r(void)
 
 int board_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 
        /* Peripheral Clock Enable Register */
-       writel(1 << AT91SAM9263_ID_PIOA |
-               1 << AT91SAM9263_ID_PIOB |
-               1 << AT91SAM9263_ID_PIOCDE |
-               1 << AT91SAM9263_ID_UHP,
+       writel(1 << ATMEL_ID_PIOA |
+               1 << ATMEL_ID_PIOB |
+               1 << ATMEL_ID_PIOCDE |
+               1 << ATMEL_ID_UHP,
                &pmc->pcer);
 
        /* initialize ET1100 Controller */
        meesc_ethercat_hw_init();
 
        /* adress of boot parameters */
-       gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
-       at91_serial_hw_init();
+       at91_seriald_hw_init();
 #ifdef CONFIG_CMD_NAND
        meesc_nand_hw_init();
 #endif
diff --git a/board/esd/otc570/config.mk b/board/esd/otc570/config.mk
deleted file mode 100644
index e554a45..0000000
--- a/board/esd/otc570/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x23f00000
diff --git a/board/esd/otc570/otc570.c b/board/esd/otc570/otc570.c
index 410d8b4..c66f99e 100644
--- a/board/esd/otc570/otc570.c
+++ b/board/esd/otc570/otc570.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2010
+ * (C) Copyright 2010-2011
  * Daniel Gorsulowski <daniel.gorsulow...@esd.eu>
  * esd electronic system design gmbh <www.esd.eu>
  *
@@ -27,6 +27,7 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <asm/arch/at91sam9263.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
@@ -36,7 +37,6 @@
 #include <asm/arch/at91_pio.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
 #include <atmel_lcdc.h>
 #include <lcd.h>
 #include <netdev.h>
@@ -73,8 +73,8 @@ int get_hw_rev(void)
 static void otc570_nand_hw_init(void)
 {
        unsigned long csa;
-       at91_smc_t      *smc    = (at91_smc_t *) AT91_SMC0_BASE;
-       at91_matrix_t   *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
+       at91_smc_t      *smc    = (at91_smc_t *) ATMEL_BASE_SMC0;
+       at91_matrix_t   *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX;
 
        /* Enable CS3 */
        csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
@@ -94,7 +94,7 @@ static void otc570_nand_hw_init(void)
        writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
                AT91_SMC_MODE_EXNW_DISABLE |
                       AT91_SMC_MODE_DBW_8 |
-                      AT91_SMC_MODE_TDF_CYCLE(2),
+                      AT91_SMC_MODE_TDF_CYCLE(3),
                &smc->cs[3].mode);
 
        /* Configure RDY/BSY */
@@ -108,9 +108,9 @@ static void otc570_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void otc570_macb_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
        /* Enable clock */
-       writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer);
+       writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
        at91_macb_hw_init();
 }
 #endif
@@ -123,7 +123,7 @@ static void otc570_macb_hw_init(void)
  */
 static void otc570_ethercat_hw_init(void)
 {
-       at91_smc_t      *smc1   = (at91_smc_t *) AT91_SMC1_BASE;
+       at91_smc_t      *smc1   = (at91_smc_t *) ATMEL_BASE_SMC1;
 
        /* Configure SMC EBI1_CS0 for EtherCAT */
        writel(AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) |
@@ -179,7 +179,7 @@ void lcd_disable(void)
 
 static void otc570_lcd_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 
        at91_set_a_periph(AT91_PIO_PORTC, 0, 0);        /* LCDVSYNC */
        at91_set_a_periph(AT91_PIO_PORTC, 1, 0);        /* LCDHSYNC */
@@ -206,7 +206,7 @@ static void otc570_lcd_hw_init(void)
        at91_set_a_periph(AT91_PIO_PORTC, 27, 0);       /* LCDD23 */
        at91_set_pio_output(AT91_PIO_PORTA, 30, 1);     /* PCI */
 
-       writel(1 << AT91SAM9263_ID_LCDC, &pmc->pcer);
+       writel(1 << ATMEL_ID_LCDC, &pmc->pcer);
        gd->fb_base = CONFIG_OTC570_LCD_BASE;
 }
 
@@ -239,8 +239,9 @@ void lcd_show_board_info(void)
 
 int dram_init(void)
 {
-       gd->bd->bi_dram[0].start = PHYS_SDRAM;
-       gd->bd->bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 << 27));
+       gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+       gd->bd->bi_dram[0].size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE,
+                                       (1 << 27));
        return 0;
 }
 
@@ -248,7 +249,7 @@ int board_eth_init(bd_t *bis)
 {
        int rc = 0;
 #ifdef CONFIG_MACB
-       rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x00);
+       rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
 #endif
        return rc;
 }
@@ -297,12 +298,12 @@ u32 get_board_rev(void)
 int misc_init_r(void)
 {
        char            str[64];
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 
        at91_set_pio_output(AT91_PIO_PORTA, 29, 1);
        at91_set_a_periph(AT91_PIO_PORTA, 26, 1);       /* TXD0 */
        at91_set_a_periph(AT91_PIO_PORTA, 27, 0);       /* RXD0 */
-       writel(1 << AT91SAM9263_ID_US0, &pmc->pcer);
+       writel(1 << ATMEL_ID_US0,       &pmc->pcer);
        /* Set USART_MODE = 1 (RS485) */
        writel(1, 0xFFF8C004);
 
@@ -333,25 +334,25 @@ int misc_init_r(void)
 
 int board_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 
        /* Peripheral Clock Enable Register */
-       writel( 1 << AT91SAM9263_ID_PIOA |
-               1 << AT91SAM9263_ID_PIOB |
-               1 << AT91SAM9263_ID_PIOCDE |
-               1 << AT91SAM9263_ID_TWI |
-               1 << AT91SAM9263_ID_SPI0 |
-               1 << AT91SAM9263_ID_LCDC |
-               1 << AT91SAM9263_ID_UHP,
+       writel( 1 << ATMEL_ID_PIOA |
+               1 << ATMEL_ID_PIOB |
+               1 << ATMEL_ID_PIOCDE |
+               1 << ATMEL_ID_TWI |
+               1 << ATMEL_ID_SPI0 |
+               1 << ATMEL_ID_LCDC |
+               1 << ATMEL_ID_UHP,
                &pmc->pcer);
 
        /* arch number of OTC570-Board */
        gd->bd->bi_arch_number = MACH_TYPE_OTC570;
 
        /* adress of boot parameters */
-       gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
-       at91_serial_hw_init();
+       at91_seriald_hw_init();
 #ifdef CONFIG_CMD_NAND
        otc570_nand_hw_init();
 #endif
diff --git a/boards.cfg b/boards.cfg
index 9b15026..77f3fc4 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -83,8 +83,10 @@ at91sam9xeek_dataflash_cs0   arm         arm926ejs   
at91sam9260ek       atmel
 at91sam9xeek_dataflash_cs1   arm         arm926ejs   at91sam9260ek       atmel 
         at91        at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1
 top9000eval_xe               arm         arm926ejs   top9000             emk   
         at91        top9000:EVAL9000
 top9000su_xe                 arm         arm926ejs   top9000             emk   
         at91        top9000:SU9000
-meesc                        arm         arm926ejs   -                   esd   
         at91
-otc570                       arm         arm926ejs   -                   esd   
         at91
+meesc                        arm         arm926ejs   meesc               esd   
         at91        meesc:AT91SAM9263,SYS_USE_NANDFLASH
+meesc_dataflash              arm         arm926ejs   meesc               esd   
         at91        meesc:AT91SAM9263,SYS_USE_DATAFLASH
+otc570                       arm         arm926ejs   otc570              esd   
         at91        otc570:AT91SAM9263,SYS_USE_NANDFLASH
+otc570_dataflash             arm         arm926ejs   otc570              esd   
         at91        otc570:AT91SAM9263,SYS_USE_DATAFLASH
 pm9261                       arm         arm926ejs   -                   
ronetix        at91
 pm9263                       arm         arm926ejs   -                   
ronetix        at91
 da830evm                     arm         arm926ejs   da8xxevm            
davinci        davinci
diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index a27b36b..dbb97ed 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -3,7 +3,7 @@
  * Stelian Pop <stelian....@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
- * (C) Copyright 2009-2010
+ * (C) Copyright 2009-2011
  * Daniel Gorsulowski <daniel.gorsulow...@esd.eu>
  * esd electronic system design gmbh <www.esd.eu>
  *
@@ -31,49 +31,67 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-/* Common stuff */
-#define CONFIG_MEESC                   1       /* Board is esd MEESC */
-#define CONFIG_ARM926EJS               1       /* This is an ARM926EJS Core */
-#define CONFIG_AT91SAM9263             1       /* It's an AT91SAM9263 SoC */
-#define CONFIG_SYS_AT91_MAIN_CLOCK     16000000/* 16.0 MHz crystal */
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
+
+/*
+ * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * adapting the initial boot program.
+ * Since the linker has to swallow that define, we must use a pure
+ * hex number here!
+ */
+#define CONFIG_SYS_TEXT_BASE           0x21f00000
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK     32768   /* slow clock xtal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     16000000/* main clock xtal */
 #define CONFIG_SYS_HZ                  1000    /* decrementer freq */
-#define CONFIG_DISPLAY_BOARDINFO       1
-#define CONFIG_DISPLAY_CPUINFO         1       /* display cpu info and speed */
-#define CONFIG_PREBOOT                         /* enable preboot variable */
-#define CONFIG_CMDLINE_TAG             1       /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS       1
-#define CONFIG_INITRD_TAG              1
-#define CONFIG_SERIAL_TAG              1
-#define CONFIG_REVISION_TAG            1
-#undef CONFIG_USE_IRQ                          /* don't need IRQ/FIQ stuff */
 
-#define CONFIG_SKIP_LOWLEVEL_INIT
+/* Misc CPU related */
+#undef CONFIG_USE_IRQ                          /* don't need IRQ/FIQ stuff */
+#define CONFIG_MEESC                           /* Board is esd MEESC */
 #define CONFIG_MISC_INIT_R                     /* Call misc_init_r */
-
+#define CONFIG_CMDLINE_TAG                     /* enable passing of ATAGs */
+#define CONFIG_PREBOOT                         /* enable preboot variable */
+#define CONFIG_DISPLAY_CPUINFO                 /* display cpu info and speed */
+#define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_ARCH_CPU_INIT
+#define CONFIG_SERIAL_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_SKIP_LOWLEVEL_INIT
 
 /*
  * Hardware drivers
  */
 
+/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
+#define ATMEL_PMC_UHP                  AT91SAM926x_PMC_UHP
+
+/* general purpose I/O */
+#define CONFIG_AT91_GPIO
+
 /* Console output */
-#define CONFIG_AT91_GPIO                       1
-#define CONFIG_ATMEL_USART                     1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3                          1       /* USART 3 is DBGU */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE              ATMEL_BASE_DBGU
+#define CONFIG_USART_ID                        ATMEL_ID_SYS
+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_SYS_BAUDRATE_TABLE      {115200, 19200, 38400, 57600, 9600}
 
-#define CONFIG_BOOTDELAY                       3
-#define CONFIG_ZERO_BOOTDELAY_CHECK            1
+#define CONFIG_BOOTDELAY               3
+#define CONFIG_ZERO_BOOTDELAY_CHECK
 
 /*
  * BOOTP options
  */
-#define CONFIG_BOOTP_BOOTFILESIZE              1
-#define CONFIG_BOOTP_BOOTPATH                  1
-#define CONFIG_BOOTP_GATEWAY                   1
-#define CONFIG_BOOTP_HOSTNAME                  1
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
 
 /*
  * Command line configuration.
@@ -84,21 +102,25 @@
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_IMLS
 
-#define CONFIG_CMD_PING                                1
-#define CONFIG_CMD_DHCP                                1
-#define CONFIG_CMD_NAND                                1
-#define CONFIG_CMD_USB                         1
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_USB
 
 /* LED */
-#define CONFIG_AT91_LED                                1
+#define CONFIG_AT91_LED
 
 /* SDRAM */
-#define CONFIG_NR_DRAM_BANKS                   1
-#define PHYS_SDRAM                             0x20000000
+#define CONFIG_NR_DRAM_BANKS           1
+#define CONFIG_SYS_SDRAM_BASE          0x20000000
+
+/* Initial stack pointer */
+#define CONFIG_SYS_INIT_SP_ADDR        \
+       (CONFIG_SYS_TEXT_BASE - GENERATED_GBL_DATA_SIZE)
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH                   1
+#define CONFIG_HAS_DATAFLASH
 #define CONFIG_SYS_SPI_WRITE_TOUT              (5 * CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS         1
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
@@ -107,14 +129,14 @@
 #define DATAFLASH_TCHS                         (0x1 << 24)
 
 /* NOR flash is not populated, disable it */
-#define CONFIG_SYS_NO_FLASH                    1
+#define CONFIG_SYS_NO_FLASH
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
-#define CONFIG_SYS_NAND_DBW_8                  1
+#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
 /* our CLE is AD22 */
@@ -125,39 +147,39 @@
 #endif
 
 /* Ethernet */
-#define CONFIG_MACB                            1
-#define CONFIG_RMII                            1
-#define CONFIG_NET_MULTI                       1
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_MULTI
+#define CONFIG_FIT
 #define CONFIG_NET_RETRY_COUNT                 20
 #undef CONFIG_RESET_PHY_R
 
 /* USB */
 #define CONFIG_USB_ATMEL
-#define CONFIG_USB_OHCI_NEW                    1
-#define CONFIG_DOS_PARTITION                   1
-#define CONFIG_SYS_USB_OHCI_CPU_INIT           1
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
 #define CONFIG_SYS_USB_OHCI_REGS_BASE          0x00a00000
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME          "at91sam9263"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     2
-#define CONFIG_USB_STORAGE                     1
-#define CONFIG_CMD_FAT                         1
-
-#define CONFIG_SYS_LOAD_ADDR                   0x22000000 /* load address */
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_FAT
 
-#define CONFIG_SYS_MEMTEST_START               PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END                 0x21e00000
+#define CONFIG_SYS_LOAD_ADDR           0x22000000 /* load address */
 
-#define CONFIG_SYS_USE_DATAFLASH               1
-#undef CONFIG_SYS_USE_NANDFLASH
+#define CONFIG_SYS_MEMTEST_START       CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END         0x21e00000
 
 /* CAN */
-#define CONFIG_AT91_CAN                                1
+#define CONFIG_AT91_CAN
 
 /* hw-controller addresses */
-#define CONFIG_ET1100_BASE                     0x70000000
+#define CONFIG_ET1100_BASE             0x70000000 /* ATMEL_BASE_CS6 */
+
+#ifdef CONFIG_SYS_USE_DATAFLASH
 
 /* bootstrap + u-boot + env in dataflash on CS0 */
-#define CONFIG_ENV_IS_IN_DATAFLASH     1
+#define CONFIG_ENV_IS_IN_DATAFLASH
 #define CONFIG_SYS_MONITOR_BASE                
(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
                                        0x8400)
 #define CONFIG_ENV_OFFSET              0x4200
@@ -165,16 +187,22 @@
                                        CONFIG_ENV_OFFSET)
 #define CONFIG_ENV_SIZE                        0x4200
 
-#define CONFIG_BAUDRATE                        115200
-#define CONFIG_SYS_BAUDRATE_TABLE      {115200 , 19200, 38400, 57600, 9600 }
+#elif CONFIG_SYS_USE_NANDFLASH
+
+/* bootstrap + u-boot + env + linux in nandflash */
+#define CONFIG_ENV_IS_IN_NAND          1
+#define CONFIG_ENV_OFFSET              0xC0000
+#define CONFIG_ENV_SIZE                        0x20000
+
+#endif
 
 #define CONFIG_SYS_PROMPT              "=> "
-#define CONFIG_SYS_CBSIZE              256
+#define CONFIG_SYS_CBSIZE              512
 #define CONFIG_SYS_MAXARGS             16
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
                                        sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP            1
-#define CONFIG_CMDLINE_EDITING         1
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
 
 /*
  * Size of malloc() pool
diff --git a/include/configs/otc570.h b/include/configs/otc570.h
index ca3bf26..013c837 100644
--- a/include/configs/otc570.h
+++ b/include/configs/otc570.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2010
+ * (C) Copyright 2010-2011
  * Daniel Gorsulowski <daniel.gorsulow...@esd.eu>
  * esd electronic system design gmbh <www.esd.eu>
  *
@@ -31,72 +31,90 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-/* Common stuff */
-#define CONFIG_OTC570                  1       /* Board is esd OTC570 */
-#define CONFIG_ARM926EJS               1       /* This is an ARM926EJS Core */
-#define CONFIG_AT91SAM9263             1       /* It's an AT91SAM9263 SoC */
-#define CONFIG_SYS_AT91_MAIN_CLOCK     16000000/* 16.0 MHz crystal */
-#define CONFIG_SYS_HZ                  1000    /* decrementer freq */
-#define CONFIG_DISPLAY_BOARDINFO       1
-#define CONFIG_DISPLAY_CPUINFO         1       /* display cpu info and speed */
-#define CONFIG_PREBOOT                         /* enable preboot variable */
-#define CONFIG_CMDLINE_TAG             1       /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS       1
-#define CONFIG_INITRD_TAG              1
-#define CONFIG_SERIAL_TAG              1
-#define CONFIG_REVISION_TAG            1
-#undef CONFIG_USE_IRQ                          /* don't need IRQ/FIQ stuff */
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
 
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_MISC_INIT_R             1       /* Call misc_init_r */
+/*
+ * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * adapting the initial boot program.
+ * Since the linker has to swallow that define, we must use a pure
+ * hex number here!
+ */
+#define CONFIG_SYS_TEXT_BASE           0x23f00000
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK     32768   /* slow clock xtal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     16000000/* main clock xtal */
+#define CONFIG_SYS_HZ                  1000    /* decrementer freq */
 
+/* Misc CPU related */
+#undef CONFIG_USE_IRQ                          /* don't need IRQ/FIQ stuff */
+#define CONFIG_OTC570                          /* Board is esd OTC570 */
+#define CONFIG_MISC_INIT_R                     /* Call misc_init_r */
+#define CONFIG_CMDLINE_TAG                     /* enable passing of ATAGs */
+#define CONFIG_PREBOOT                         /* enable preboot variable */
+#define CONFIG_DISPLAY_CPUINFO                 /* display cpu info and speed */
+#define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_ARCH_CPU_INIT
+#define CONFIG_SERIAL_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_SKIP_LOWLEVEL_INIT
 
 /*
  * Hardware drivers
  */
-#define CONFIG_AT91_GPIO               1
+
+/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
+#define ATMEL_PMC_UHP                  AT91SAM926x_PMC_UHP
+
+/* general purpose I/O */
+#define CONFIG_AT91_GPIO
 
 /* Console output */
-#define CONFIG_ATMEL_USART             1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3                  1       /* USART 3 is DBGU */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE              ATMEL_BASE_DBGU
+#define CONFIG_USART_ID                        ATMEL_ID_SYS
+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_SYS_BAUDRATE_TABLE      {115200, 19200, 38400, 57600, 9600}
 
 #define CONFIG_BOOTDELAY               3
-#define CONFIG_ZERO_BOOTDELAY_CHECK    1
+#define CONFIG_ZERO_BOOTDELAY_CHECK
 
 /* LCD */
-#define CONFIG_LCD                     1
+#define CONFIG_LCD
 #define LCD_BPP                                LCD_COLOR8
 
 #undef CONFIG_SPLASH_SCREEN
 
 #ifndef CONFIG_SPLASH_SCREEN
-#define CONFIG_LCD_LOGO                        1
-#define CONFIG_LCD_INFO                        1
+#define CONFIG_LCD_LOGO
+#define CONFIG_LCD_INFO
 #undef CONFIG_LCD_INFO_BELOW_LOGO
 #endif /* CONFIG_SPLASH_SCREEN */
 
 #undef LCD_TEST_PATTERN
-#define CONFIG_SYS_WHITE_ON_BLACK      1
-#define CONFIG_ATMEL_LCD               1
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV   1
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONFIG_ATMEL_LCD
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_OTC570_LCD_BASE         0x23E00000      /* LCD is in SDRAM */
-#define CONFIG_CMD_BMP                 1
+#define CONFIG_CMD_BMP
 
 /* RTC and I2C stuff */
-#define CONFIG_RTC_DS1338              1
+#define CONFIG_RTC_DS1338
 #define CONFIG_SYS_I2C_RTC_ADDR                0x68
 #undef CONFIG_HARD_I2C
-#define CONFIG_SOFT_I2C                        1
+#define CONFIG_SOFT_I2C
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           0x7F
 
 #ifdef CONFIG_SOFT_I2C
-#define CONFIG_I2C_CMD_TREE            1
-#define CONFIG_I2C_MULTI_BUS           1
+#define CONFIG_I2C_CMD_TREE
+#define CONFIG_I2C_MULTI_BUS
 /* Configure data and clock pins for pio */
 #define I2C_INIT { \
        at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
@@ -116,16 +134,13 @@
 #define I2C_DELAY              udelay(2) /* 1/4 I2C clock duration */
 #endif /* CONFIG_SOFT_I2C */
 
-#define CONFIG_BOOTDELAY               3
-#define CONFIG_ZERO_BOOTDELAY_CHECK    1
-
 /*
  * BOOTP options
  */
-#define CONFIG_BOOTP_BOOTFILESIZE      1
-#define CONFIG_BOOTP_BOOTPATH          1
-#define CONFIG_BOOTP_GATEWAY           1
-#define CONFIG_BOOTP_HOSTNAME          1
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
 
 /*
  * Command line configuration.
@@ -135,23 +150,27 @@
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_IMLS
 
-#define CONFIG_CMD_PING                        1
-#define CONFIG_CMD_DHCP                        1
-#define CONFIG_CMD_NAND                        1
-#define CONFIG_CMD_USB                 1
-#define CONFIG_CMD_I2C                 1
-#define CONFIG_CMD_DATE                        1
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DATE
 
 /* LED */
-#define CONFIG_AT91_LED                        1
+#define CONFIG_AT91_LED
 
 /* SDRAM */
-#define CONFIG_NR_DRAM_BANKS                   1
-#define PHYS_SDRAM                             0x20000000
+#define CONFIG_NR_DRAM_BANKS           1
+#define CONFIG_SYS_SDRAM_BASE          0x20000000
+
+/* Initial stack pointer */
+#define CONFIG_SYS_INIT_SP_ADDR        \
+       (CONFIG_SYS_TEXT_BASE - GENERATED_GBL_DATA_SIZE)
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH                   1
+#define CONFIG_HAS_DATAFLASH
 #define CONFIG_SYS_SPI_WRITE_TOUT              (5 * CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS         1
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0    0xC0000000      /* CS0 */
@@ -160,14 +179,14 @@
 #define DATAFLASH_TCHS                         (0x1 << 24)
 
 /* NOR flash is not populated, disable it */
-#define CONFIG_SYS_NO_FLASH                    1
+#define CONFIG_SYS_NO_FLASH
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
-#define CONFIG_SYS_NAND_DBW_8                  1
+#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
 /* our CLE is AD22 */
@@ -178,39 +197,39 @@
 #endif
 
 /* Ethernet */
-#define CONFIG_MACB                            1
-#define CONFIG_RMII                            1
-#define CONFIG_NET_MULTI                       1
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_MULTI
+#define CONFIG_FIT
 #define CONFIG_NET_RETRY_COUNT                 20
 #undef CONFIG_RESET_PHY_R
 
 /* USB */
 #define CONFIG_USB_ATMEL
-#define CONFIG_USB_OHCI_NEW                    1
-#define CONFIG_DOS_PARTITION                   1
-#define CONFIG_SYS_USB_OHCI_CPU_INIT           1
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
 #define CONFIG_SYS_USB_OHCI_REGS_BASE          0x00a00000
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME          "at91sam9263"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     2
-#define CONFIG_USB_STORAGE                     1
-#define CONFIG_CMD_FAT                         1
-
-#define CONFIG_SYS_LOAD_ADDR                   0x22000000 /* load address */
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_FAT
 
-#define CONFIG_SYS_MEMTEST_START               PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END                 0x23e00000
+#define CONFIG_SYS_LOAD_ADDR           0x22000000 /* load address */
 
-#define CONFIG_SYS_USE_DATAFLASH               1
-#undef CONFIG_SYS_USE_NANDFLASH
+#define CONFIG_SYS_MEMTEST_START       CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END         0x23e00000
 
 /* CAN */
-#define CONFIG_AT91_CAN                                1
+#define CONFIG_AT91_CAN
 
 /* hw-controller addresses */
-#define CONFIG_ET1100_BASE                     0x70000000
+#define CONFIG_ET1100_BASE             0x70000000 /* ATMEL_BASE_CS6 */
+
+#ifdef CONFIG_SYS_USE_DATAFLASH
 
 /* bootstrap + u-boot + env in dataflash on CS0 */
-#define CONFIG_ENV_IS_IN_DATAFLASH     1
+#define CONFIG_ENV_IS_IN_DATAFLASH
 #define CONFIG_SYS_MONITOR_BASE                
(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
                                        0x8400)
 #define CONFIG_ENV_OFFSET              0x4200
@@ -218,16 +237,22 @@
                                        CONFIG_ENV_OFFSET)
 #define CONFIG_ENV_SIZE                        0x4200
 
-#define CONFIG_BAUDRATE                        115200
-#define CONFIG_SYS_BAUDRATE_TABLE      {115200 , 19200, 38400, 57600, 9600 }
+#elif CONFIG_SYS_USE_NANDFLASH
+
+/* bootstrap + u-boot + env + linux in nandflash */
+#define CONFIG_ENV_IS_IN_NAND          1
+#define CONFIG_ENV_OFFSET              0xC0000
+#define CONFIG_ENV_SIZE                        0x20000
+
+#endif
 
 #define CONFIG_SYS_PROMPT              "=> "
-#define CONFIG_SYS_CBSIZE              256
+#define CONFIG_SYS_CBSIZE              512
 #define CONFIG_SYS_MAXARGS             16
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
                                        sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP            1
-#define CONFIG_CMDLINE_EDITING         1
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
 
 /*
  * Size of malloc() pool
-- 
1.5.3

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