> From: Peter Yu-Chien Lin(林宇謙) <peter...@andestech.com> > Sent: Thursday, January 19, 2023 3:06 PM > To: u-boot@lists.denx.de > Cc: Leo Yu-Chi Liang(梁育齊) <ycli...@andestech.com>; Rick Jian-Zhi Chen(陳建志) > <r...@andestech.com>; Peter Yu-Chien Lin(林宇謙) <peter...@andestech.com> > Subject: [PATCH 03/11] board: AndesTech: ax25-ae350.c: Enable v5l2-cache in > spl_board_init() > > The L2-cache is not enabled currently, the enbale_caches() will call the > v5l2_enable() callback to enable it in SPL. > > Signed-off-by: Yu Chien Peter Lin <peter...@andestech.com> > --- > board/AndesTech/ax25-ae350/ax25-ae350.c | 17 +++++++++-------- > 1 file changed, 9 insertions(+), 8 deletions(-)
Reviewed-by: Rick Chen <r...@andestech.com>
