On Mon, 28 Nov 2022 01:02:26 -0600
Samuel Holland <sam...@sholland.org> wrote:
Hi,
> From: Jernej Skrabec <jernej.skra...@gmail.com>
>
> Currently HDMI controller MMIO address is hardcoded. Change that so
> address is read from DT node. That will make adding support for new
> variants a bit easier.
Looks good:
Reviewed-by: Andre Przywara <andre.przyw...@arm.com>
Cheers,
Andre
> Signed-off-by: Jernej Skrabec <jernej.skra...@gmail.com>
> Signed-off-by: Samuel Holland <sam...@sholland.org>
> ---
>
> drivers/video/sunxi/sunxi_dw_hdmi.c | 39 ++++++++++++++++++-----------
> 1 file changed, 24 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c
> b/drivers/video/sunxi/sunxi_dw_hdmi.c
> index e7265af7d8f..4f5d0989286 100644
> --- a/drivers/video/sunxi/sunxi_dw_hdmi.c
> +++ b/drivers/video/sunxi/sunxi_dw_hdmi.c
> @@ -56,10 +56,10 @@ static int sunxi_dw_hdmi_get_divider(uint clock)
> return 1;
> }
>
> -static void sunxi_dw_hdmi_phy_init(void)
> +static void sunxi_dw_hdmi_phy_init(struct dw_hdmi *hdmi)
> {
> struct sunxi_hdmi_phy * const phy =
> - (struct sunxi_hdmi_phy *)(SUNXI_HDMI_BASE + HDMI_PHY_OFFS);
> + (struct sunxi_hdmi_phy *)(hdmi->ioaddr + HDMI_PHY_OFFS);
> unsigned long tmo;
> u32 tmp;
>
> @@ -113,10 +113,10 @@ static void sunxi_dw_hdmi_phy_init(void)
> writel(0x42494E47, &phy->unscramble);
> }
>
> -static void sunxi_dw_hdmi_phy_set(uint clock, int phy_div)
> +static void sunxi_dw_hdmi_phy_set(struct dw_hdmi *hdmi, uint clock, int
> phy_div)
> {
> struct sunxi_hdmi_phy * const phy =
> - (struct sunxi_hdmi_phy *)(SUNXI_HDMI_BASE + HDMI_PHY_OFFS);
> + (struct sunxi_hdmi_phy *)(hdmi->ioaddr + HDMI_PHY_OFFS);
> int div = sunxi_dw_hdmi_get_divider(clock);
> u32 tmp;
>
> @@ -270,7 +270,7 @@ static int sunxi_dw_hdmi_phy_cfg(struct dw_hdmi *hdmi,
> uint mpixelclock)
> int phy_div;
>
> sunxi_dw_hdmi_pll_set(mpixelclock / 1000, &phy_div);
> - sunxi_dw_hdmi_phy_set(mpixelclock, phy_div);
> + sunxi_dw_hdmi_phy_set(hdmi, mpixelclock, phy_div);
>
> return 0;
> }
> @@ -291,10 +291,10 @@ static bool sunxi_dw_hdmi_mode_valid(struct udevice
> *dev,
> static int sunxi_dw_hdmi_enable(struct udevice *dev, int panel_bpp,
> const struct display_timing *edid)
> {
> + struct sunxi_dw_hdmi_priv *priv = dev_get_priv(dev);
> struct sunxi_hdmi_phy * const phy =
> - (struct sunxi_hdmi_phy *)(SUNXI_HDMI_BASE + HDMI_PHY_OFFS);
> + (struct sunxi_hdmi_phy *)(priv->hdmi.ioaddr + HDMI_PHY_OFFS);
> struct display_plat *uc_plat = dev_get_uclass_plat(dev);
> - struct sunxi_dw_hdmi_priv *priv = dev_get_priv(dev);
> int ret;
>
> ret = dw_hdmi_enable(&priv->hdmi, edid);
> @@ -316,7 +316,7 @@ static int sunxi_dw_hdmi_enable(struct udevice *dev, int
> panel_bpp,
> * again or othwerwise BSP driver won't work. Dummy read is
> * needed or otherwise last write doesn't get written correctly.
> */
> - (void)readb(SUNXI_HDMI_BASE);
> + (void)readb(priv->hdmi.ioaddr);
> writel(0, &phy->unscramble);
>
> return 0;
> @@ -345,13 +345,7 @@ static int sunxi_dw_hdmi_probe(struct udevice *dev)
> /* Clock on */
> setbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_GATE);
>
> - sunxi_dw_hdmi_phy_init();
> -
> - priv->hdmi.ioaddr = SUNXI_HDMI_BASE;
> - priv->hdmi.i2c_clk_high = 0xd8;
> - priv->hdmi.i2c_clk_low = 0xfe;
> - priv->hdmi.reg_io_width = 1;
> - priv->hdmi.phy_set = sunxi_dw_hdmi_phy_cfg;
> + sunxi_dw_hdmi_phy_init(&priv->hdmi);
>
> ret = dw_hdmi_phy_wait_for_hpd(&priv->hdmi);
> if (ret < 0) {
> @@ -364,6 +358,20 @@ static int sunxi_dw_hdmi_probe(struct udevice *dev)
> return 0;
> }
>
> +static int sunxi_dw_hdmi_of_to_plat(struct udevice *dev)
> +{
> + struct sunxi_dw_hdmi_priv *priv = dev_get_priv(dev);
> + struct dw_hdmi *hdmi = &priv->hdmi;
> +
> + hdmi->ioaddr = (ulong)dev_read_addr(dev);
> + hdmi->i2c_clk_high = 0xd8;
> + hdmi->i2c_clk_low = 0xfe;
> + hdmi->reg_io_width = 1;
> + hdmi->phy_set = sunxi_dw_hdmi_phy_cfg;
> +
> + return 0;
> +}
> +
> static const struct dm_display_ops sunxi_dw_hdmi_ops = {
> .read_edid = sunxi_dw_hdmi_read_edid,
> .enable = sunxi_dw_hdmi_enable,
> @@ -380,6 +388,7 @@ U_BOOT_DRIVER(sunxi_dw_hdmi) = {
> .id = UCLASS_DISPLAY,
> .of_match = sunxi_dw_hdmi_ids,
> .probe = sunxi_dw_hdmi_probe,
> + .of_to_plat = sunxi_dw_hdmi_of_to_plat,
> .priv_auto = sizeof(struct sunxi_dw_hdmi_priv),
> .ops = &sunxi_dw_hdmi_ops,
> };
