Hi Tony,
On 12/19/22 07:17, Stefan Roese wrote:
<snip>
git checkout 37bb396669b27aa62fe8bc5eeb6bfde92e09c2d3
Previous HEAD position was 3b44b3fdf2 arm: mvebu: Add support for
programming LD0 and LD1 eFuse
HEAD is now at 37bb396669 timer: orion-timer: Only init timer once
This is where the Pogo V4 was frozen during boot. Among the Kirkwood
boards that I have and used for testing, it is the only one that has
CONFIG_BOOTSTAGE=y.
Thanks for testing and git bi-secting.
Should I create a new post for would like to continue this topic here
in this thread?
Let me check, if I can find the root cause and this problem quickly. If
not, then we should probably disable CONFIG_BOOTSTAGE on the Pogo v4 for
a short while until we've fixed this issue.
I fail to spot the problem with this small commit 37bb396669b27a. I can
also not reproduce this on my Armada XP board - it uses SPL though, this
might make a difference.
Could you perhaps apply this attached debug patch and make sure, that
you have DEBUG_UART enabled in your Pogo v4 config. And boot into the
resulting image.
Thanks,
Stefan
diff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c
index d0eab3ce781d..8c5cfa46762c 100644
--- a/drivers/timer/orion-timer.c
+++ b/drivers/timer/orion-timer.c
@@ -5,6 +5,7 @@
#include <dm/device.h>
#include <dm/fdtaddr.h>
#include <timer.h>
+#include <debug_uart.h>
#define TIMER_CTRL 0x00
#define TIMER0_EN BIT(0)
@@ -33,6 +34,7 @@ static void orion_timer_init(void *base, enum input_clock_type type)
return;
early_init_done = true;
+ printch('1'); // test-only
writel(~0, base + TIMER0_VAL);
writel(~0, base + TIMER0_RELOAD);
@@ -56,6 +58,7 @@ static uint64_t orion_timer_get_count(void *base)
/* Early (e.g. bootstage etc) timer functions */
static void notrace timer_early_init(void)
{
+ printch('2'); // test-only
if (IS_ENABLED(CONFIG_ARCH_MVEBU))
orion_timer_init((void *)MVEBU_TIMER_BASE, INPUT_CLOCK_25MHZ);
else
@@ -90,6 +93,7 @@ ulong timer_get_boot_us(void)
{
u64 ticks;
+ printch('3'); // test-only
ticks = timer_early_get_count();
return lldiv(ticks * 1000, timer_early_get_rate());
}
@@ -108,6 +112,7 @@ static int orion_timer_probe(struct udevice *dev)
enum input_clock_type type = dev_get_driver_data(dev);
struct orion_timer_priv *priv = dev_get_priv(dev);
+ printch('4'); // test-only
priv->base = devfdt_remap_addr_index(dev, 0);
if (!priv->base) {
debug("unable to map registers\n");
