This converts the following to Kconfig:
CONFIG_SPD_EEPROM
Cc: Stefan Roese <s...@denx.de>
Signed-off-by: Tom Rini <tr...@konsulko.com>
---
Note that this increases the size of SPL on db-mv784mp-gp as now the
SPD_EEPROM code is being included, where it wasn't before seemingly.
---
README | 7 -------
configs/MPC8548CDS_36BIT_defconfig | 1 +
configs/MPC8548CDS_defconfig | 1 +
configs/MPC8548CDS_legacy_defconfig | 1 +
configs/socrates_defconfig | 1 +
drivers/ddr/Kconfig | 8 ++++++++
include/configs/MPC8548CDS.h | 1 -
include/configs/db-mv784mp-gp.h | 3 ---
include/configs/socrates.h | 1 -
9 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/README b/README
index dd43a0c08d4a..0acc0b410917 100644
--- a/README
+++ b/README
@@ -1683,13 +1683,6 @@ Low Level (hardware related) configuration options:
Sets the EBC0_CFG register for the NDFC. If not defined
a default value will be used.
-- CONFIG_SPD_EEPROM
- Get DDR timing information from an I2C EEPROM. Common
- with pluggable memory modules such as SODIMMs
-
- SPD_EEPROM_ADDRESS
- I2C address of the SPD EEPROM
-
- CONFIG_SYS_SPD_BUS_NUM
If SPD EEPROM is on an I2C bus other than the first
one, specify here. Note that the value must resolve
diff --git a/configs/MPC8548CDS_36BIT_defconfig
b/configs/MPC8548CDS_36BIT_defconfig
index 98a2c4f85fc5..8d2a0785a8af 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -45,6 +45,7 @@ CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="8548cds/uImage.uboot"
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC0"
+CONFIG_SPD_EEPROM=y
CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index b47dbb533cee..5faba03e136d 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -44,6 +44,7 @@ CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="8548cds/uImage.uboot"
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC0"
+CONFIG_SPD_EEPROM=y
CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
diff --git a/configs/MPC8548CDS_legacy_defconfig
b/configs/MPC8548CDS_legacy_defconfig
index af2c6a25eb9c..dbabf665cbf4 100644
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -44,6 +44,7 @@ CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="8548cds/uImage.uboot"
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC0"
+CONFIG_SPD_EEPROM=y
CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index ab52ea26a089..f45f570764cd 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -57,6 +57,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_ADDR_REDUND=0xFFF20000
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="TSEC0"
+CONFIG_SPD_EEPROM=y
CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xFE001001
diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig
index 738b7884012f..fa873cc48750 100644
--- a/drivers/ddr/Kconfig
+++ b/drivers/ddr/Kconfig
@@ -37,3 +37,11 @@ config SYS_SPD_BUS_NUM
source "drivers/ddr/altera/Kconfig"
source "drivers/ddr/imx/Kconfig"
+
+config SPD_EEPROM
+ bool "DDR controller makes use of an SPD EEPROM for JEDEC information"
+ depends on SYS_FSL_DDR || SYS_FSL_MMDC || CONFIG_ARMADA_XP
+ help
+ Get DDR timing information from an I2C EEPROM. Common with pluggable
+ memory modules such as SODIMMs. You must define SPD_EEPROM_ADDRESS
+ to the I2C address of the SPD EEPROM.
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 83eb18c3b7ac..780ee5ae865a 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -30,7 +30,6 @@
#define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index 7b305955c962..bf8b35102ad7 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -45,7 +45,4 @@
/* SPL */
/* Defines for SPL */
-/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_SPD_EEPROM 0x4e
-
#endif /* _CONFIG_DB_MV7846MP_GP_H */
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 0a2d5815170b..95393d3ab25e 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -50,7 +50,6 @@
#define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR
/* DDR Setup */
-#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
--
2.25.1
