Hi Jaehoon, >-----Original Message----- >From: Jaehoon Chung <jh80.ch...@gmail.com> >Sent: Friday, October 7, 2022 6:16 PM >To: Soma, Ashok Reddy <ashok.reddy.s...@amd.com>; u-boot@lists.denx.de >Cc: Simek, Michal <michal.si...@amd.com>; peng....@nxp.com; >jh80.ch...@samsung.com; Halder, Ayan Kumar <ayan.kumar.hal...@amd.com>; Mehta, >Piyush <piyush.me...@amd.com>; lakshmi.sai.krishna.potth...@amd.com; >shravya.kumb...@amd.com >Subject: Re: [PATCH 1/3] mmc: zynq_sdhci: Change node_id prototype to u32 > > > >On 9/30/22 18:25, Ashok Reddy Soma wrote: >> In Versal platform power domain node_id is bigger than u8, hence >> change prototype to u32 to accommodate. Change u8 to u32 in the >> function prototypes that use node_id and remove casting to u32 from >> xilinx_pm_request() call parameters. >> >> Signed-off-by: Ashok Reddy Soma <ashok.reddy.s...@amd.com> >> --- >> >> drivers/mmc/zynq_sdhci.c | 14 +++++++------- >> 1 file changed, 7 insertions(+), 7 deletions(-) >> >> diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index >> 8f4071c8c2..3a4194452c 100644 >> --- a/drivers/mmc/zynq_sdhci.c >> +++ b/drivers/mmc/zynq_sdhci.c >> @@ -111,7 +111,7 @@ static const u8 mode2timing[] = { >> [MMC_HS_200] = MMC_TIMING_MMC_HS200, }; >> >> -static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 >> itap_delay) >> +static inline int arasan_zynqmp_set_in_tapdelay(u32 node_id, u32 >> +itap_delay) > >Is it passed by u8 from sdhci_zynqmp_sampleclk_set_pahse()?
Seems like I missed to change the type to u32 from where these functions are called. But those lines are removed in patch 2/3. Should I send V2 or is it okay ? Thanks, Ashok > > >Best Regards, >Jaehoon Chung > >> { >> int ret; >> >> @@ -155,7 +155,7 @@ static inline int arasan_zynqmp_set_in_tapdelay(u8 >> node_id, u32 itap_delay) >> if (ret) >> return ret; >> } else { >> - return xilinx_pm_request(PM_IOCTL, (u32)node_id, >> + return xilinx_pm_request(PM_IOCTL, node_id, >> IOCTL_SET_SD_TAPDELAY, >> PM_TAPDELAY_INPUT, itap_delay, NULL); >> } >> @@ -163,7 +163,7 @@ static inline int arasan_zynqmp_set_in_tapdelay(u8 >> node_id, u32 itap_delay) >> return 0; >> } >> >> -static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32 >> otap_delay) >> +static inline int arasan_zynqmp_set_out_tapdelay(u32 node_id, u32 >> +otap_delay) >> { >> if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { >> if (node_id == NODE_SD_0) >> @@ -174,13 +174,13 @@ static inline int arasan_zynqmp_set_out_tapdelay(u8 >> node_id, u32 otap_delay) >> return zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, >> (otap_delay << 16)); >> } else { >> - return xilinx_pm_request(PM_IOCTL, (u32)node_id, >> + return xilinx_pm_request(PM_IOCTL, node_id, >> IOCTL_SET_SD_TAPDELAY, >> PM_TAPDELAY_OUTPUT, otap_delay, NULL); >> } >> } >> >> -static inline int zynqmp_dll_reset(u8 node_id, u32 type) >> +static inline int zynqmp_dll_reset(u32 node_id, u32 type) >> { >> if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { >> if (node_id == NODE_SD_0) >> @@ -192,12 +192,12 @@ static inline int zynqmp_dll_reset(u8 node_id, u32 >> type) >> type == PM_DLL_RESET_ASSERT ? >> SD1_DLL_RST : 0); >> } else { >> - return xilinx_pm_request(PM_IOCTL, (u32)node_id, >> + return xilinx_pm_request(PM_IOCTL, node_id, >> IOCTL_SD_DLL_RESET, type, 0, NULL); >> } >> } >> >> -static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 >> node_id) >> +static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u32 >> +node_id) >> { >> struct mmc *mmc = (struct mmc *)host->mmc; >> struct udevice *dev = mmc->dev;