On Wed, Sep 28, 2022 at 03:11:46PM +0300, Roger Quadros wrote: > Hi, > > The GPMC is a unified memory controller dedicated for interfacing > with external memory devices like > - Asynchronous SRAM-like memories and ASICs > - Asynchronous, synchronous, and page mode burst NOR flash > - NAND flash > - Pseudo-SRAM devices > > This driver will take care of setting up the GPMC based on > the settings specified in the Device tree and then > probe its children.
Does this mean we'll be seeing some updates to (or removal of) the existing nand/gpmc code under arch/arm/mach-omap2 ? -- Tom
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