On 22.12.2010 12:04, Alexander Holler wrote:
gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.
Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations
when
gcc 4.5.1 is used.
Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current
headers.
I haven't add the definitions which are using a memory barrier because I
haven't found
a place in the kernel where they were actually enabled
(CONFIG_ARM_DMA_MEM_BUFFERABLE).
Signed-off-by: Alexander Holler<hol...@ahsoftware.de>
---
arch/arm/include/asm/io.h | 20 ++++++++++++++------
1 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index ff1518e..068ed17 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -125,13 +125,21 @@ extern inline void __raw_readsl(unsigned int addr, void
*data, int longlen)
#define __raw_readw(a) __arch_getw(a)
#define __raw_readl(a) __arch_getl(a)
-#define writeb(v,a) __arch_putb(v,a)
-#define writew(v,a) __arch_putw(v,a)
-#define writel(v,a) __arch_putl(v,a)
+/*
+ * TODO: The kernel offers some more advanced versions of barriers, it might
+ * have some advantages to use them instead of the simple one here.
+ */
+#define dmb() __asm__ __volatile__ ("" : : : "memory")
+#define __iormb() dmb()
+#define __iowmb() dmb()
+
+#define writeb(v,c) do { __iowmb(); __arch_putb(v,c); }
while (0)
+#define writew(v,c) do { __iowmb(); __arch_putw(v,c); }
while (0)
+#define writel(v,c) do { __iowmb(); __arch_putl(v,c); }
while (0)
-#define readb(a) __arch_getb(a)
-#define readw(a) __arch_getw(a)
-#define readl(a) __arch_getl(a)
+#define readb(c) ({ u8 __v = __arch_getb(c); __iormb();
__v; })
+#define readw(c) ({ u16 __v = __arch_getw(c); __iormb();
__v; })
+#define readl(c) ({ u32 __v = __arch_getl(c); __iormb();
__v; })
Do you like to test the patch in the attachment? I named it 'v4'.
After some thinking and testing, it seems to me that the volatile
optimization issue this patch shall fix is only with the readx()
macros. So the idea is to drop all writex() changes done in the v3
version of this patch. With dropping the writex() changes, we would
drop all issues we discussed with e.g. the GCC statement-expression
and the do while workaround, too.
Thanks
Dirk
Subject: [PATCH v4] ARM: Avoid compiler optimization for usages of readb and
friends.
gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.
Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations
when
gcc 4.5.1 is used.
Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current
headers.
I haven't add the definitions which are using a memory barrier because I
haven't found
a place in the kernel where they were actually enabled
(CONFIG_ARM_DMA_MEM_BUFFERABLE).
Signed-off-by: Alexander Holler <hol...@ahsoftware.de>
Signed-off-by: Wolfgang Denk <w...@denx.de>
Signed-off-by: Dirk Behme <dirk.be...@googlemail.com>
---
Changes since v3: Drop all changes to writex(). It seems that
the compiler issue is only with readx(), so we don't have to
touch the writex() macros. With not touching the writex()
macros, we don't have to care about issues introduced by
touching them, too.
Note: Tested by compilation only, not tested on real HW.
arch/arm/include/asm/io.h | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
Index: u-boot.git/arch/arm/include/asm/io.h
===================================================================
--- u-boot.git.orig/arch/arm/include/asm/io.h
+++ u-boot.git/arch/arm/include/asm/io.h
@@ -128,10 +128,16 @@ extern inline void __raw_readsl(unsigned
#define writeb(v,a) __arch_putb(v,a)
#define writew(v,a) __arch_putw(v,a)
#define writel(v,a) __arch_putl(v,a)
+/*
+ * TODO: The kernel offers some more advanced versions of barriers, it might
+ * have some advantages to use them instead of the simple one here.
+ */
+#define dmb() __asm__ __volatile__ ("" : : : "memory")
+#define __iormb() dmb()
-#define readb(a) __arch_getb(a)
-#define readw(a) __arch_getw(a)
-#define readl(a) __arch_getl(a)
+#define readb(c) ({ u8 __v = __arch_getb(c); __iormb();
__v; })
+#define readw(c) ({ u16 __v = __arch_getw(c); __iormb();
__v; })
+#define readl(c) ({ u32 __v = __arch_getl(c); __iormb();
__v; })
/*
* The compiler seems to be incapable of optimising constants
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