Hi
Am Mi., 13. Juli 2022 um 11:53 Uhr schrieb Frieder Schrempf <frie...@fris.de>:
>
> From: Frieder Schrempf <frieder.schre...@kontron.de>
>
> It turns out that it is not necessary to declare the VSELECT signal as
> GPIO and let the PMIC driver set it to a fixed high level. This switches
> the voltage between 3.3V and 1.8V by setting the PMIC register for LDO5
> accordingly.
>
> Instead we can do it like other boards already do and simply mux the
> VSELECT signal of the USDHC interface to the pin. This makes sure that
> the correct voltage is selected by setting the PMIC's SD_VSEL input
> to high or low accordingly.
>
> Reported-by: Heiko Thiery <heiko.thi...@gmail.com>
> Signed-off-by: Frieder Schrempf <frieder.schre...@kontron.de>
Reviewed-by: Heiko Thiery <heiko.thi...@gmail.com>
> ---
> arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi | 5 -----
> arch/arm/dts/imx8mm-kontron-n801x-s.dts | 3 +++
> arch/arm/dts/imx8mm-kontron-n801x-som.dtsi | 2 --
> 3 files changed, 3 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi
> b/arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi
> index 2c62f05cec1..a42881d1a89 100644
> --- a/arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi
> @@ -62,11 +62,6 @@
>
> &pinctrl_pmic {
> u-boot,dm-spl;
> - fsl,pins = <
> - MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
> - /* Disable Pullup for SD_VSEL */
> - MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x41
> - >;
> };
>
> &pinctrl_uart3 {
> diff --git a/arch/arm/dts/imx8mm-kontron-n801x-s.dts
> b/arch/arm/dts/imx8mm-kontron-n801x-s.dts
> index cb8102bb8db..bc46426ad8f 100644
> --- a/arch/arm/dts/imx8mm-kontron-n801x-s.dts
> +++ b/arch/arm/dts/imx8mm-kontron-n801x-s.dts
> @@ -321,6 +321,7 @@
> MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
> MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
> MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
> + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
> >;
> };
>
> @@ -333,6 +334,7 @@
> MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
> MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
> MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
> + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
> >;
> };
>
> @@ -345,6 +347,7 @@
> MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
> MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
> MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
> + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
> >;
> };
> };
> diff --git a/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi
> b/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi
> index a981a6b4ac0..2d0661cce89 100644
> --- a/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi
> +++ b/arch/arm/dts/imx8mm-kontron-n801x-som.dtsi
> @@ -82,7 +82,6 @@
> pinctrl-0 = <&pinctrl_pmic>;
> interrupt-parent = <&gpio1>;
> interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> - sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
>
> regulators {
> reg_vdd_soc: BUCK1 {
> @@ -225,7 +224,6 @@
> pinctrl_pmic: pmicgrp {
> fsl,pins = <
> MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
> - MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x141
> >;
> };
>
> --
> 2.37.0
>
