> -----Original Message----- > From: Maniyam, Dinesh <dinesh.mani...@intel.com> > Sent: Friday, 13 May 2022 3:05 pm > To: u-boot@lists.denx.de > Cc: Lim, Elly Siew Chin <elly.siew.chin....@intel.com>; Chee, Tien Fong > <tien.fong.c...@intel.com>; Hea, Kok Kiang <kok.kiang....@intel.com>; Gan, > Yau Wai <yau.wai....@intel.com>; Kho, Sin Hui <sin.hui....@intel.com>; > Lokanathan, Raaj <raaj.lokanat...@intel.com>; Maniyam, Dinesh > <dinesh.mani...@intel.com> > Subject: [PATCH v2] ddr: altera: soc64: Integer fix overflow that caused DDR > size > mismatched > > From: Dinesh Maniyam <dinesh.mani...@intel.com> > > Convert the constant integer to 'phys_size_t' to avoid overflow when > calculating > the SDRAM size. > > Signed-off-by: Dinesh Maniyam <dinesh.mani...@intel.com> > > --- > > v1->v2 > - Add space in title > --- > drivers/ddr/altera/sdram_soc64.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/ddr/altera/sdram_soc64.c > b/drivers/ddr/altera/sdram_soc64.c > index d6baac2410..1f479c514d 100644 > --- a/drivers/ddr/altera/sdram_soc64.c > +++ b/drivers/ddr/altera/sdram_soc64.c > @@ -239,7 +239,8 @@ phys_size_t sdram_calculate_size(struct > altera_sdram_plat *plat) { > u32 dramaddrw = hmc_readl(plat, DRAMADDRW); > > - phys_size_t size = 1 << > (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + > + phys_size_t size = (phys_size_t)1 << > + (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + > > DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) + > DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) > + > DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) > + > -- > 2.26.2
I will re-submit a new version of this patch to update the copyright and alignment Regards, Dinesh