Hi Patrick
On 5/9/22 17:13, Patrick Delaunay wrote:
> Introduce STM32MP15 function and defines to prepare the
> STM32MP13 introduction.
>
> Signed-off-by: Patrick Delaunay <patrick.delau...@st.com>
> Signed-off-by: Patrick Delaunay <patrick.delau...@foss.st.com>
> ---
>
> arch/arm/mach-stm32mp/fdt.c | 123 ++++++++++++++++++++----------------
> 1 file changed, 67 insertions(+), 56 deletions(-)
>
> diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/fdt.c
> index ad45728949..5d37a44d97 100644
> --- a/arch/arm/mach-stm32mp/fdt.c
> +++ b/arch/arm/mach-stm32mp/fdt.c
> @@ -28,13 +28,13 @@
>
> #define ETZPC_RESERVED 0xffffffff
>
> -#define STM32_FDCAN_BASE 0x4400e000
> -#define STM32_CRYP2_BASE 0x4c005000
> -#define STM32_CRYP1_BASE 0x54001000
> -#define STM32_GPU_BASE 0x59000000
> -#define STM32_DSI_BASE 0x5a000000
> +#define STM32MP15_FDCAN_BASE 0x4400e000
> +#define STM32MP15_CRYP2_BASE 0x4c005000
> +#define STM32MP15_CRYP1_BASE 0x54001000
> +#define STM32MP15_GPU_BASE 0x59000000
> +#define STM32MP15_DSI_BASE 0x5a000000
>
> -static const u32 stm32mp1_ip_addr[] = {
> +static const u32 stm32mp15_ip_addr[] = {
> 0x5c008000, /* 00 stgenc */
> 0x54000000, /* 01 bkpsram */
> 0x5c003000, /* 02 iwdg1 */
> @@ -44,7 +44,7 @@ static const u32 stm32mp1_ip_addr[] = {
> ETZPC_RESERVED, /* 06 reserved */
> 0x54003000, /* 07 rng1 */
> 0x54002000, /* 08 hash1 */
> - STM32_CRYP1_BASE, /* 09 cryp1 */
> + STM32MP15_CRYP1_BASE, /* 09 cryp1 */
> 0x5a003000, /* 0A ddrctrl */
> 0x5a004000, /* 0B ddrphyc */
> 0x5c009000, /* 0C i2c6 */
> @@ -97,7 +97,7 @@ static const u32 stm32mp1_ip_addr[] = {
> 0x4400b000, /* 3B sai2 */
> 0x4400c000, /* 3C sai3 */
> 0x4400d000, /* 3D dfsdm */
> - STM32_FDCAN_BASE, /* 3E tt_fdcan */
> + STM32MP15_FDCAN_BASE, /* 3E tt_fdcan */
> ETZPC_RESERVED, /* 3F reserved */
> 0x50021000, /* 40 lptim2 */
> 0x50022000, /* 41 lptim3 */
> @@ -110,7 +110,7 @@ static const u32 stm32mp1_ip_addr[] = {
> 0x48003000, /* 48 adc */
> 0x4c002000, /* 49 hash2 */
> 0x4c003000, /* 4A rng2 */
> - STM32_CRYP2_BASE, /* 4B cryp2 */
> + STM32MP15_CRYP2_BASE, /* 4B cryp2 */
> ETZPC_RESERVED, /* 4C reserved */
> ETZPC_RESERVED, /* 4D reserved */
> ETZPC_RESERVED, /* 4E reserved */
> @@ -163,8 +163,13 @@ static int stm32_fdt_fixup_etzpc(void *fdt, int soc_node)
> int offset, shift;
> u32 addr, status, decprot[ETZPC_DECPROT_NB];
>
> - array = stm32mp1_ip_addr;
> - array_size = ARRAY_SIZE(stm32mp1_ip_addr);
> + if (IS_ENABLED(CONFIG_STM32MP13x))
> + return 0;
> +
> + if (IS_ENABLED(CONFIG_STM32MP15x)) {
> + array = stm32mp15_ip_addr;
> + array_size = ARRAY_SIZE(stm32mp15_ip_addr);
> + }
>
> for (i = 0; i < ETZPC_DECPROT_NB; i++)
> decprot[i] = readl(ETZPC_DECPROT(i));
> @@ -248,33 +253,9 @@ static void stm32_fdt_disable_optee(void *blob)
> }
> }
>
> -/*
> - * This function is called right before the kernel is booted. "blob" is the
> - * device tree that will be passed to the kernel.
> - */
> -int ft_system_setup(void *blob, struct bd_info *bd)
> +static void stm32mp15_fdt_fixup(void *blob, int soc, u32 cpu, char *name)
> {
> - int ret = 0;
> - int soc;
> - u32 pkg, cpu;
> - char name[SOC_NAME_SIZE];
> -
> - if (IS_ENABLED(CONFIG_STM32MP13x))
> - return 0;
> -
> - soc = fdt_path_offset(blob, "/soc");
> - if (soc < 0)
> - return soc;
> -
> - if (CONFIG_IS_ENABLED(STM32_ETZPC)) {
> - ret = stm32_fdt_fixup_etzpc(blob, soc);
> - if (ret)
> - return ret;
> - }
> -
> - /* MPUs Part Numbers and name*/
> - cpu = get_cpu_type();
> - get_soc_name(name);
> + u32 pkg;
>
> switch (cpu) {
> case CPU_STM32MP151Fxx:
> @@ -284,19 +265,18 @@ int ft_system_setup(void *blob, struct bd_info *bd)
> stm32_fdt_fixup_cpu(blob, name);
> /* after cpu delete we can't trust the soc offsets anymore */
> soc = fdt_path_offset(blob, "/soc");
> - stm32_fdt_disable(blob, soc, STM32_FDCAN_BASE, "can", name);
> - /* fall through */
> + stm32_fdt_disable(blob, soc, STM32MP15_FDCAN_BASE, "can", name);
> + fallthrough;
> case CPU_STM32MP153Fxx:
> case CPU_STM32MP153Dxx:
> case CPU_STM32MP153Cxx:
> case CPU_STM32MP153Axx:
> - stm32_fdt_disable(blob, soc, STM32_GPU_BASE, "gpu", name);
> - stm32_fdt_disable(blob, soc, STM32_DSI_BASE, "dsi", name);
> + stm32_fdt_disable(blob, soc, STM32MP15_GPU_BASE, "gpu", name);
> + stm32_fdt_disable(blob, soc, STM32MP15_DSI_BASE, "dsi", name);
> break;
> default:
> break;
> }
> -
> switch (cpu) {
> case CPU_STM32MP157Dxx:
> case CPU_STM32MP157Axx:
> @@ -304,13 +284,14 @@ int ft_system_setup(void *blob, struct bd_info *bd)
> case CPU_STM32MP153Axx:
> case CPU_STM32MP151Dxx:
> case CPU_STM32MP151Axx:
> - stm32_fdt_disable(blob, soc, STM32_CRYP1_BASE, "cryp", name);
> - stm32_fdt_disable(blob, soc, STM32_CRYP2_BASE, "cryp", name);
> + stm32_fdt_disable(blob, soc, STM32MP15_CRYP1_BASE, "cryp",
> + name);
> + stm32_fdt_disable(blob, soc, STM32MP15_CRYP2_BASE, "cryp",
> + name);
> break;
> default:
> break;
> }
> -
> switch (get_cpu_package()) {
> case STM32MP15_PKG_AA_LBGA448:
> pkg = STM32MP_PKG_AA;
> @@ -334,18 +315,48 @@ int ft_system_setup(void *blob, struct bd_info *bd)
> do_fixup_by_compat_u32(blob, "st,stm32mp157-z-pinctrl",
> "st,package", pkg, false);
> }
> +}
> +
> +/*
> + * This function is called right before the kernel is booted. "blob" is the
> + * device tree that will be passed to the kernel.
> + */
> +int ft_system_setup(void *blob, struct bd_info *bd)
> +{
> + int ret = 0;
> + int soc;
> + u32 cpu;
> + char name[SOC_NAME_SIZE];
> +
> + soc = fdt_path_offset(blob, "/soc");
> + if (soc < 0)
> + return soc;
> +
> + if (CONFIG_IS_ENABLED(STM32_ETZPC)) {
> + ret = stm32_fdt_fixup_etzpc(blob, soc);
> + if (ret)
> + return ret;
> + }
>
> - /*
> - * TEMP: remove OP-TEE nodes in kernel device tree
> - * copied from U-Boot device tree by optee_copy_fdt_nodes
> - * when OP-TEE is not detected (probe failed)
> - * these OP-TEE nodes are present in <board>-u-boot.dtsi
> - * under CONFIG_STM32MP15x_STM32IMAGE only for compatibility
> - * when FIP is not used by TF-A
> - */
> - if (CONFIG_IS_ENABLED(STM32MP15x_STM32IMAGE) &&
> - !tee_find_device(NULL, NULL, NULL, NULL))
> - stm32_fdt_disable_optee(blob);
> + /* MPUs Part Numbers and name*/
> + cpu = get_cpu_type();
> + get_soc_name(name);
> +
> + if (IS_ENABLED(CONFIG_STM32MP15x)) {
> + stm32mp15_fdt_fixup(blob, soc, cpu, name);
> +
> + /*
> + * TEMP: remove OP-TEE nodes in kernel device tree
> + * copied from U-Boot device tree by optee_copy_fdt_nodes
> + * when OP-TEE is not detected (probe failed)
> + * these OP-TEE nodes are present in <board>-u-boot.dtsi
> + * under CONFIG_STM32MP15x_STM32IMAGE only for compatibility
> + * when FIP is not used by TF-A
> + */
> + if (CONFIG_IS_ENABLED(STM32MP15x_STM32IMAGE) &&
> + !tee_find_device(NULL, NULL, NULL, NULL))
> + stm32_fdt_disable_optee(blob);
> + }
>
> return ret;
> }
Reviewed-by: Patrice Chotard <patrice.chot...@foss.st.com>
Thanks
Patrice
