So far the U-Boot proper support for the Allwinner F1C100 family of SoCs was really limited: we could realistically only deal with FEL booting, as there was no storage or network device acessible from U-Boot proper.
This series enables the MMC and SPI controller, to be able to actually load something from the device. This is made possible by the updates to the devicetree in Linux, which now describes those devices. The first patch is taken from George's/Yifan's older series, and adds DM_CLK support for the F1C100s. The DM_PINCTRL support was already added with the DM conversion a few weeks back. Patches 2-4 fix the SPI driver clock setup, and add support for the differing SPI clock on the F1C100. Patch 5 updates the devicetree files, freshly synced from linux-next. Patch 6 reverts a hack we introduced back then to fix the reset functionality, with the DT update this is now no longer needed. The final patch adds SPI flash support to the Licheepi Nano defconfig, as these boards mostly ship with SPI flash soldered. Please have a look and test! Cheers, Andre Andre Przywara (6): spi: sunxi: refactor SPI speed/mode programming spi: sunxi: improve SPI clock calculation spi: sunxi: Add support for F1C100s SPI controller sunxi: F1C100s: update DT files from Linux Revert "sunxi: f1c100s: Drop SYSRESET to enable reset functionality" sunxi: licheepi_nano: enable SPI flash George Hilliard (1): clk: sunxi: implement clock driver for suniv f1c100s arch/arm/dts/suniv-f1c100s-licheepi-nano.dts | 31 ++++++ arch/arm/dts/suniv-f1c100s.dtsi | 104 ++++++++++++++++-- configs/licheepi_nano_defconfig | 4 +- drivers/clk/sunxi/Kconfig | 7 ++ drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_f1c100s.c | 74 +++++++++++++ drivers/spi/spi-sunxi.c | 109 +++++++++++-------- 7 files changed, 275 insertions(+), 55 deletions(-) create mode 100644 drivers/clk/sunxi/clk_f1c100s.c -- 2.35.3
