Hi Sean, > -----Original Message----- > From: Sean Anderson <sean.ander...@seco.com> > Sent: Wednesday, April 20, 2022 3:32 AM > To: u-boot@lists.denx.de; Priyanka Jain <priyanka.j...@nxp.com> > Cc: Yinbo Zhu <yinbo....@nxp.com>; Ran Wang <ran.wan...@nxp.com>; Prabhakar > Kushwaha <prabhakar.kushw...@nxp.com>; Tom > Rini <tr...@konsulko.com> > Subject: Re: [PATCH 2/2] arm: layerscape: Disable erratum A009007 on LS1021A, > LS1043A, and LS1046A > > On 2/22/22 1:38 PM, Sean Anderson wrote: > > This erratum is reported to cause problems on these processors [1-3]. > > The problem is usually with the clocking, which is supposed to be > > configured by the RCW [4]. However, if it is not set, or if the > > default clocking is not correct, then this erratum will cause an SError. > > However, according to Ran Wang in [1]: > > > >> ... this erratum is used to pass USB compliance test only, you could > >> disable this workaround on your board if you don't any USB issue on > >> normal use case, I think it's fine. > > > > So just disable this erratum by default for these processors. > > > > [1] > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore > > .kernel.org%2Fall%2F761ddd61-05c1-d9b8-ac90-b8f425afde6c%40denx.de%2F& > > amp;data=05%7C01%7Cran.wang_1%40nxp.com%7C3a19547d54eb46a572cc08da223b > > 3cff%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637859935071826709%7 > > CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1 > > haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=0QLVw7ZIW9SYBrTqtCIfFClz > > eA63jn72oAMlw18Y6FA%3D&reserved=0 > > [2] > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fcomm > > unity.nxp.com%2Ft5%2FLayerscape%2FLS1046A-U-BOOT-HALT-AT-ERRATUM-A0090 > > 078%2Fm-p%2F742993&data=05%7C01%7Cran.wang_1%40nxp.com%7C3a19547d5 > > 4eb46a572cc08da223b3cff%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6 > > 37859935071826709%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoi > > V2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=dTV6k > > AUn%2BqNDzdXEoEb0EwJEzqbTcFBVFeFpy3XbcnM%3D&reserved=0 > > [3] > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fcomm > > unity.nxp.com%2Ft5%2FQorIQ%2FWhy-does-the-LS1043A-U-Boot-hang-at-code- > > that-fixes-erratum%2Fm-p%2F644412&data=05%7C01%7Cran.wang_1%40nxp. > > com%7C3a19547d54eb46a572cc08da223b3cff%7C686ea1d3bc2b4c6fa92cd99c5c301 > > 635%7C0%7C0%7C637859935071826709%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wL > > jAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C& > > amp;sdata=5xJd%2BrKCd8b%2Ft8AovVisDuLAsg%2B7aJz%2FA4wZp7echB0%3D&r > > eserved=0 [4] > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fsour > > ce.codeaurora.org%2Fexternal%2Fqoriq%2Fqoriq-components%2Frcw%2Ftree%2 > > Fls1046ardb%2Fusb_phy_freq.rcw&data=05%7C01%7Cran.wang_1%40nxp.com > > %7C3a19547d54eb46a572cc08da223b3cff%7C686ea1d3bc2b4c6fa92cd99c5c301635 > > %7C0%7C0%7C637859935071826709%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAw > > MDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C& > > ;sdata=I9mZiTLAofR7%2F0aWsLvOGoI%2B9xEDhPmRJADbBOZiwwU%3D&reserved > > =0 > > > > Signed-off-by: Sean Anderson <sean.ander...@seco.com>
Acked-by: Ran Wang <ran.wan...@nxp.com> > > --- > > > > arch/arm/cpu/armv7/ls102xa/Kconfig | 1 - > > arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 -- > > 2 files changed, 3 deletions(-) > > > > diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig > > b/arch/arm/cpu/armv7/ls102xa/Kconfig > > index 6a948d7ba7..cec93a27db 100644 > > --- a/arch/arm/cpu/armv7/ls102xa/Kconfig > > +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig > > @@ -7,7 +7,6 @@ config ARCH_LS1021A > > select SYS_FSL_ERRATUM_A008407 > > select SYS_FSL_ERRATUM_A008850 > > select SYS_FSL_ERRATUM_A008997 if USB > > - select SYS_FSL_ERRATUM_A009007 if USB > > select SYS_FSL_ERRATUM_A009008 if USB > > select SYS_FSL_ERRATUM_A009663 > > select SYS_FSL_ERRATUM_A009798 if USB diff --git > > a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > > b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > > index 9bb870dcd8..f5a18053e6 100644 > > --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > > +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig > > @@ -74,7 +74,6 @@ config ARCH_LS1043A > > select SYS_FSL_DDR_VER_50 > > select SYS_FSL_ERRATUM_A008850 if !TFABOOT > > select SYS_FSL_ERRATUM_A008997 > > - select SYS_FSL_ERRATUM_A009007 > > select SYS_FSL_ERRATUM_A009008 > > select SYS_FSL_ERRATUM_A009660 if !TFABOOT > > select SYS_FSL_ERRATUM_A009663 if !TFABOOT @@ -112,7 +111,6 @@ > > config ARCH_LS1046A > > select SYS_FSL_ERRATUM_A008511 if !TFABOOT > > select SYS_FSL_ERRATUM_A008850 if !TFABOOT > > select SYS_FSL_ERRATUM_A008997 > > - select SYS_FSL_ERRATUM_A009007 > > select SYS_FSL_ERRATUM_A009008 > > select SYS_FSL_ERRATUM_A009798 > > select SYS_FSL_ERRATUM_A009801 > > > > ping? Can someone from NXP comment on this (either for or against)? I am not longer take USB ownership for Layerscape platforms. Please also include my colleague Jun for any further review. Thanks & Regards, Ran
