On 4/14/22 18:48, Marek Vasut wrote:
On 4/14/22 18:37, Patrick DELAUNAY wrote:
Hi Marek,
Hi,
on ST platform the ASR/SSR/HSR request are already provided by the DDR
settings with pwrctl register value
it is managed in TF-A by
arm-trusted-firmware/drivers/st/ddr/stm32mp1_ddr_helpers.c
Sure, I don't use ATF and I have no intention of ever using ATF on this
platform.
enumstm32mp1_ddr_sr_mode ddr_read_sr_mode(void)
{
uint32_tpwrctl = mmio_read_32(stm32mp_ddrctrl_base() + DDRCTRL_PWRCTL);
switch(pwrctl & (DDRCTRL_PWRCTL_EN_DFI_DRAM_CLK_DISABLE |
DDRCTRL_PWRCTL_SELFREF_EN)) {
case0U:
returnDDR_SSR_MODE;
caseDDRCTRL_PWRCTL_EN_DFI_DRAM_CLK_DISABLE:
returnDDR_HSR_MODE;
caseDDRCTRL_PWRCTL_EN_DFI_DRAM_CLK_DISABLE | DDRCTRL_PWRCTL_SELFREF_EN:
returnDDR_ASR_MODE;
default:
returnDDR_SR_MODE_INVALID;
}
}
no need to add an other property
This is for U-Boot, plain, stock, without any other software partaking
in it.
Note that this patch just reinstates the old behavior before v2022.04
release, except it adds a DT property to enable the new behavior with
ASR and makes it non-default.
