Dear Andreas, > It would be great if you can test that pllloop thing to indicate the wrong > counter (80 instead of 40) did (or not) break anything. So the question is do > we need that specific patch in v2010.12 to get arm920t/at91 boards working or > is it a 'nice to have' for future releases, e.g. when we do a complete rework > of the lowlevel_init() for arm920t/at91. > I don't think that this will be fix the nor boot problems. In my opinion, we have some SOC specific problems:
1. In start.s the vector table is relocated from _start to 0x00. But at this time 0x00 is remaped to nor flash. 2. On NOR boot we have no RAM at 0x00, until SRAM is remaped whit Remap Control Register. Nowhere fount in source. 3. On start NOR is mapped to address 0x0. So if we use 0x1000000 as textbase the board hangs after relocation. 4. I can't found any code to setup CS0 timings (use (slow) defaults only) But, I can not check my thesis, until I get back my JTAG debugger end of next week. regard Jens Scharsig _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
