This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <sam...@sholland.org>
---

(no changes since v1)

 arch/arm/include/asm/arch-sunxi/gpio.h |  1 -
 drivers/pwm/sunxi_pwm.c                | 11 -----------
 2 files changed, 12 deletions(-)

diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h 
b/arch/arm/include/asm/arch-sunxi/gpio.h
index cf5afdac6a..9f07d907e5 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -159,7 +159,6 @@ enum sunxi_gpio_number {
 
 #define SUNXI_GPD_LCD0         2
 #define SUNXI_GPD_LVDS0                3
-#define SUNXI_GPD_PWM          2
 
 #define SUNIV_GPE_UART0                5
 
diff --git a/drivers/pwm/sunxi_pwm.c b/drivers/pwm/sunxi_pwm.c
index e3d5ee456b..bb1bec05ec 100644
--- a/drivers/pwm/sunxi_pwm.c
+++ b/drivers/pwm/sunxi_pwm.c
@@ -13,7 +13,6 @@
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <asm/arch/pwm.h>
-#include <asm/arch/gpio.h>
 #include <power/regulator.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -45,14 +44,6 @@ static const u32 prescaler_table[] = {
        1,      /* 1111 */
 };
 
-static int sunxi_pwm_config_pinmux(void)
-{
-#ifdef CONFIG_MACH_SUN50I
-       sunxi_gpio_set_cfgpin(SUNXI_GPD(22), SUNXI_GPD_PWM);
-#endif
-       return 0;
-}
-
 static int sunxi_pwm_set_invert(struct udevice *dev, uint channel,
                                bool polarity)
 {
@@ -137,8 +128,6 @@ static int sunxi_pwm_set_enable(struct udevice *dev, uint 
channel, bool enable)
                return 0;
        }
 
-       sunxi_pwm_config_pinmux();
-
        if (priv->invert)
                v &= ~SUNXI_PWM_CTRL_CH0_ACT_STA;
        else
-- 
2.33.1

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